cpu: samd21: use periph_common SPI functions
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@ -6,4 +6,7 @@ export CFLAGS += -DDONT_USE_CMSIS_INIT
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# use the hwtimer compatibility layer
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USEMODULE += hwtimer_compat
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# use common periph functions
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USEMODULE += periph_common
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include $(RIOTCPU)/Makefile.include.cortexm_common
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@ -88,6 +88,15 @@ typedef enum {
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*/
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int gpio_init_mux(gpio_t dev, gpio_mux_t mux);
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/**
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* @brief declare needed generic SPI functions
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* @{
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*/
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTES
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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@ -258,47 +258,6 @@ int spi_transfer_byte(spi_t dev, char out, char *in)
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return 1;
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}
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int spi_transfer_bytes(spi_t dev, char *out, char *in, unsigned int length)
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{
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int transfered = 0;
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if (out != NULL) {
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DEBUG("out*: %p out: %x length: %x\n", out, *out, length);
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while (length--) {
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int ret = spi_transfer_byte(dev, *(out)++, 0);
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if (ret < 0) {
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return ret;
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}
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transfered += ret;
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}
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}
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if (in != NULL) {
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while (length--) {
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int ret = spi_transfer_byte(dev, 0, in++);
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if (ret < 0) {
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return ret;
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}
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transfered += ret;
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}
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DEBUG("in*: %p in: %x transfered: %x\n", in, *(in-transfered), transfered);
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}
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DEBUG("sent %x byte(s)\n", transfered);
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return transfered;
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}
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int spi_transfer_reg(spi_t dev, uint8_t reg, char out, char *in)
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{
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spi_transfer_byte(dev, reg, NULL);
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return spi_transfer_byte(dev, out, in);
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}
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int spi_transfer_regs(spi_t dev, uint8_t reg, char *out, char *in, unsigned int length)
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{
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spi_transfer_byte(dev, reg, NULL);
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return spi_transfer_bytes(dev, out, in, length);
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}
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void spi_poweron(spi_t dev)
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{
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switch(dev) {
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