From 89b987494e3dd548e914236674b92f022d325590 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Fri, 8 Nov 2019 15:19:58 +0100 Subject: [PATCH] cpu/sam0_common: rtt: enable COUNTSYNC in CTRLA From the data sheet: > The COUNT register requires synchronization when reading. > Disabling the synchronization will prevent reading valid > values from the COUNT register. Without this bit enabled, rtt_get_counter() will always return 0. --- cpu/sam0_common/periph/rtt.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/cpu/sam0_common/periph/rtt.c b/cpu/sam0_common/periph/rtt.c index c8793f4463..384ca92fd0 100644 --- a/cpu/sam0_common/periph/rtt.c +++ b/cpu/sam0_common/periph/rtt.c @@ -27,6 +27,14 @@ #define ENABLE_DEBUG 0 #include "debug.h" +/* + * Bit introduced by SAML21xxxB, setting it on SAML21xxxxA too has no ill + * effects, but simplifies the code. (This bit is always set on SAML21xxxxA) + */ +#ifndef RTC_MODE0_CTRLA_COUNTSYNC +#define RTC_MODE0_CTRLA_COUNTSYNC BIT15 +#endif + static rtt_cb_t _overflow_cb; static void* _overflow_arg; @@ -91,7 +99,7 @@ void rtt_init(void) /* set 32bit counting mode & enable the RTC */ #ifdef REG_RTC_MODE0_CTRLA - RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | RTC_MODE0_CTRLA_ENABLE; + RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | RTC_MODE0_CTRLA_ENABLE | RTC_MODE0_CTRLA_COUNTSYNC; #else RTC->MODE0.CTRL.reg = RTC_MODE0_CTRL_MODE(0) | RTC_MODE0_CTRL_ENABLE; #endif