From 679fee7f9cc7146e07e2eafe8eeb0e980d45c76d Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Wed, 13 Mar 2019 10:46:57 +0100 Subject: [PATCH 1/7] cpu/stm32_common: implement low-power modes for L4 --- cpu/stm32_common/include/periph_cpu_common.h | 2 +- cpu/stm32_common/periph/pm.c | 45 +++++++++++++++++--- 2 files changed, 41 insertions(+), 6 deletions(-) diff --git a/cpu/stm32_common/include/periph_cpu_common.h b/cpu/stm32_common/include/periph_cpu_common.h index 8c293b9f5b..9aab22febc 100644 --- a/cpu/stm32_common/include/periph_cpu_common.h +++ b/cpu/stm32_common/include/periph_cpu_common.h @@ -81,7 +81,7 @@ extern "C" { #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \ defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) || \ defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) || \ - defined(DOXYGEN) + defined(CPU_FAM_STM32L4) || defined(DOXYGEN) /** * @brief Number of usable low power modes */ diff --git a/cpu/stm32_common/periph/pm.c b/cpu/stm32_common/periph/pm.c index be6a79a00b..05b0141000 100644 --- a/cpu/stm32_common/periph/pm.c +++ b/cpu/stm32_common/periph/pm.c @@ -3,6 +3,7 @@ * 2015 Freie Universität Berlin * 2015 Engineering-Spirit * 2017-2019 OTA keys S.A. + * 2019 Inria * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level @@ -21,6 +22,7 @@ * @author Kaspar Schleiser * @author Fabian Nack * @author Vincent Dupont + * @author Alexandre Abadie * * @} */ @@ -42,6 +44,10 @@ #define PM_STOP_CONFIG (PWR_CR_LPDS) #elif defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) #define PM_STOP_CONFIG (PWR_CR_LPSDSR | PWR_CR_ULP) +#elif defined(CPU_FAM_STM32L4) +#define PM_STOP_CONFIG (PWR_CR1_LPMS_STOP1) +#elif defined(CPU_FAM_STM32F7) +#define PM_STOP_CONFIG (PWR_CR1_LPDS | PWR_CR1_FPDS | PWR_CR1_LPUDS) #else #define PM_STOP_CONFIG (PWR_CR_LPDS | PWR_CR_FPDS) #endif @@ -55,11 +61,31 @@ */ #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) #define PM_STANDBY_CONFIG (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF | PWR_CR_ULP) +#elif defined(CPU_FAM_STM32L4) +#define PM_STANDBY_CONFIG (PWR_CR1_LPMS_STANDBY) +#elif defined(CPU_FAM_STM32F7) +#define PM_STANDBY_CONFIG (PWR_CR1_PDDS | PWR_CR1_CSBF) #else #define PM_STANDBY_CONFIG (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF) #endif #endif +#if defined(CPU_FAM_STM32L4) +#define PWR_CR_REG PWR->CR1 +#define PWR_WUP_REG PWR->CR3 +/* Allow overridable SRAM2 retention mode using CFLAGS */ +#ifndef STM32L4_SRAM2_RETENTION +/* Disable SRAM2 retention by default for maximum power saving */ +#define STM32L4_SRAM2_RETENTION (0) +#endif +#elif defined(CPU_FAM_STM32F7) +#define PWR_CR_REG PWR->CR1 +#define PWR_WUP_REG PWR->CSR2 +#else +#define PWR_CR_REG PWR->CR +#define PWR_WUP_REG PWR->CSR +#endif + void pm_set(unsigned mode) { int deep; @@ -67,18 +93,27 @@ void pm_set(unsigned mode) switch (mode) { #ifdef STM32_PM_STANDBY case STM32_PM_STANDBY: - PWR->CR &= ~(PM_STOP_CONFIG | PM_STANDBY_CONFIG); - PWR->CR |= PM_STANDBY_CONFIG; + PWR_CR_REG &= ~(PM_STOP_CONFIG | PM_STANDBY_CONFIG); + PWR_CR_REG |= PM_STANDBY_CONFIG; +#if defined(CPU_FAM_STM32L4) +#if STM32L4_SRAM2_RETENTION + PWR->CR3 |= PWR_CR3_RRS; +#else + PWR->CR3 &= ~PWR_CR3_RRS; +#endif + /* Clear flags */ + PWR->SCR |= PWR_SCR_CSBF; +#endif /* Enable WKUP pin to use for wakeup from standby mode */ - PWR->CSR |= PM_EWUP_CONFIG; + PWR_WUP_REG |= PM_EWUP_CONFIG; /* Set SLEEPDEEP bit of system control block */ deep = 1; break; #endif #ifdef STM32_PM_STOP case STM32_PM_STOP: - PWR->CR &= ~(PM_STOP_CONFIG | PM_STANDBY_CONFIG); - PWR->CR |= PM_STOP_CONFIG; + PWR_CR_REG &= ~(PM_STOP_CONFIG | PM_STANDBY_CONFIG); + PWR_CR_REG |= PM_STOP_CONFIG; /* Set SLEEPDEEP bit of system control block */ deep = 1; break; From d5c1d2fdc4b310b6abadb4e034f6f6ec14393e62 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Wed, 13 Mar 2019 10:47:21 +0100 Subject: [PATCH 2/7] cpu/stm32l4: use pm_layered module --- cpu/stm32l4/Makefile.include | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cpu/stm32l4/Makefile.include b/cpu/stm32l4/Makefile.include index 82e28ee689..ccfedba106 100644 --- a/cpu/stm32l4/Makefile.include +++ b/cpu/stm32l4/Makefile.include @@ -1,5 +1,7 @@ export CPU_ARCH = cortex-m4f export CPU_FAM = stm32l4 +USEMODULE += pm_layered + include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk From 84f9f63ab8e998eafe1442c647c30332f3327d79 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 14 Mar 2019 11:03:18 +0100 Subject: [PATCH 3/7] cpu/stm32_common: implement low-power modes for F7 --- cpu/stm32_common/include/periph_cpu_common.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/cpu/stm32_common/include/periph_cpu_common.h b/cpu/stm32_common/include/periph_cpu_common.h index 9aab22febc..c61acbcaaf 100644 --- a/cpu/stm32_common/include/periph_cpu_common.h +++ b/cpu/stm32_common/include/periph_cpu_common.h @@ -80,8 +80,9 @@ extern "C" { */ #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \ defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) || \ - defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) || \ - defined(CPU_FAM_STM32L4) || defined(DOXYGEN) + defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \ + defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32L4) || \ + defined(DOXYGEN) /** * @brief Number of usable low power modes */ From 3fc8a13ddd4232c8f7160d1e6f1f0ccd96fb7e0c Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 14 Mar 2019 11:03:39 +0100 Subject: [PATCH 4/7] cpu/stm32f7: use pm_layered module --- cpu/stm32f7/Makefile.include | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cpu/stm32f7/Makefile.include b/cpu/stm32f7/Makefile.include index 2e32400dd1..2417ef526c 100644 --- a/cpu/stm32f7/Makefile.include +++ b/cpu/stm32f7/Makefile.include @@ -1,5 +1,7 @@ export CPU_ARCH = cortex-m7 export CPU_FAM = stm32f7 +USEMODULE += pm_layered + include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk From 738af9da51b28b6e56434e19f75230d8a46b7ece Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Tue, 19 Mar 2019 17:45:36 +0100 Subject: [PATCH 5/7] cpu/stm32_common: add low-power modes for stm32f3 --- cpu/stm32_common/periph/pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/stm32_common/periph/pm.c b/cpu/stm32_common/periph/pm.c index 05b0141000..cca24bcf80 100644 --- a/cpu/stm32_common/periph/pm.c +++ b/cpu/stm32_common/periph/pm.c @@ -40,7 +40,7 @@ * * Available values can be found in reference manual, PWR section, register CR. */ -#if defined(CPU_FAM_STM32F0) +#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) #define PM_STOP_CONFIG (PWR_CR_LPDS) #elif defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) #define PM_STOP_CONFIG (PWR_CR_LPSDSR | PWR_CR_ULP) From 2e0a818502d08c1cb5c4a9205205dfdfdfde6b63 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Tue, 19 Mar 2019 17:46:13 +0100 Subject: [PATCH 6/7] cpu/stm32: all stm32 families now provide pm support --- cpu/stm32_common/Makefile.include | 3 +++ cpu/stm32_common/include/periph_cpu_common.h | 6 ------ cpu/stm32f0/Makefile.include | 2 -- cpu/stm32f1/Makefile.include | 2 -- cpu/stm32f2/Makefile.include | 2 -- cpu/stm32f4/Makefile.include | 2 -- cpu/stm32f7/Makefile.include | 2 -- cpu/stm32l0/Makefile.include | 2 -- cpu/stm32l1/Makefile.include | 2 -- cpu/stm32l4/Makefile.include | 2 -- 10 files changed, 3 insertions(+), 22 deletions(-) diff --git a/cpu/stm32_common/Makefile.include b/cpu/stm32_common/Makefile.include index 13ce83f9c2..3a92639203 100644 --- a/cpu/stm32_common/Makefile.include +++ b/cpu/stm32_common/Makefile.include @@ -5,6 +5,9 @@ export CFLAGS += -DCPU_FAM_$(FAM) # include common periph module USEMODULE += periph_common +# All stm32 families provide pm support +USEMODULE += pm_layered + # include stm32 common functions and stm32 common periph drivers USEMODULE += stm32_common stm32_common_periph diff --git a/cpu/stm32_common/include/periph_cpu_common.h b/cpu/stm32_common/include/periph_cpu_common.h index c61acbcaaf..2debe87737 100644 --- a/cpu/stm32_common/include/periph_cpu_common.h +++ b/cpu/stm32_common/include/periph_cpu_common.h @@ -78,11 +78,6 @@ extern "C" { * @name PM definitions * @{ */ -#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \ - defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) || \ - defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \ - defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32L4) || \ - defined(DOXYGEN) /** * @brief Number of usable low power modes */ @@ -102,7 +97,6 @@ extern "C" { */ #define PM_EWUP_CONFIG (0U) #endif -#endif /** @} */ /** diff --git a/cpu/stm32f0/Makefile.include b/cpu/stm32f0/Makefile.include index 2010afd0ad..18fc5c661d 100644 --- a/cpu/stm32f0/Makefile.include +++ b/cpu/stm32f0/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m0 export CPU_FAM = stm32f0 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32f1/Makefile.include b/cpu/stm32f1/Makefile.include index abe4696648..7ca8e6dec6 100644 --- a/cpu/stm32f1/Makefile.include +++ b/cpu/stm32f1/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m3 export CPU_FAM = stm32f1 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32f2/Makefile.include b/cpu/stm32f2/Makefile.include index 453f82cd46..38ab4d6357 100644 --- a/cpu/stm32f2/Makefile.include +++ b/cpu/stm32f2/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m3 export CPU_FAM = stm32f2 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32f4/Makefile.include b/cpu/stm32f4/Makefile.include index c88560db69..4d3c26695c 100644 --- a/cpu/stm32f4/Makefile.include +++ b/cpu/stm32f4/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m4f export CPU_FAM = stm32f4 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32f7/Makefile.include b/cpu/stm32f7/Makefile.include index 2417ef526c..2e32400dd1 100644 --- a/cpu/stm32f7/Makefile.include +++ b/cpu/stm32f7/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m7 export CPU_FAM = stm32f7 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32l0/Makefile.include b/cpu/stm32l0/Makefile.include index 779df613a4..ccf6a3b05e 100644 --- a/cpu/stm32l0/Makefile.include +++ b/cpu/stm32l0/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m0plus export CPU_FAM = stm32l0 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32l1/Makefile.include b/cpu/stm32l1/Makefile.include index a61c7299f6..3d6f379e13 100644 --- a/cpu/stm32l1/Makefile.include +++ b/cpu/stm32l1/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m3 export CPU_FAM = stm32l1 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk diff --git a/cpu/stm32l4/Makefile.include b/cpu/stm32l4/Makefile.include index ccfedba106..82e28ee689 100644 --- a/cpu/stm32l4/Makefile.include +++ b/cpu/stm32l4/Makefile.include @@ -1,7 +1,5 @@ export CPU_ARCH = cortex-m4f export CPU_FAM = stm32l4 -USEMODULE += pm_layered - include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTMAKE)/arch/cortexm.inc.mk From d6fb676814392a298687b01263652816dd8839cc Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Thu, 21 Mar 2019 19:42:08 +0100 Subject: [PATCH 7/7] stm32l0/pm: clear wakeup flags when setting STOP mode. --- cpu/stm32_common/periph/pm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cpu/stm32_common/periph/pm.c b/cpu/stm32_common/periph/pm.c index cca24bcf80..d2cf058d67 100644 --- a/cpu/stm32_common/periph/pm.c +++ b/cpu/stm32_common/periph/pm.c @@ -43,7 +43,8 @@ #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) #define PM_STOP_CONFIG (PWR_CR_LPDS) #elif defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) -#define PM_STOP_CONFIG (PWR_CR_LPSDSR | PWR_CR_ULP) +/* Enable ultra low-power and clear wakeup flags */ +#define PM_STOP_CONFIG (PWR_CR_LPSDSR | PWR_CR_ULP | PWR_CR_CWUF) #elif defined(CPU_FAM_STM32L4) #define PM_STOP_CONFIG (PWR_CR1_LPMS_STOP1) #elif defined(CPU_FAM_STM32F7)