cpu/stm32l4: implement MCO configuration
This commit is contained in:
Alexandre Abadie
parent
d62111ce76
commit
18b5f417d1
@ -26,6 +26,7 @@
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#include "cpu.h"
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#include "stmclk.h"
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#include "periph_conf.h"
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#include "periph/gpio.h"
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/* map CMSIS defines not present in stm32wb55xx.h */
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#if defined(CPU_FAM_STM32WB)
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@ -106,6 +107,7 @@
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#endif
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/** @} */
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/* Define MSI range bit fields */
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#if CONFIG_CLOCK_MSI == KHZ(100)
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#define CLOCK_MSIRANGE (RCC_CR_MSIRANGE_0)
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#elif CONFIG_CLOCK_MSI == KHZ(200)
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@ -134,6 +136,142 @@
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#error "Invalid MSI clock"
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#endif
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/* Configure MCO */
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#ifndef CONFIG_CLOCK_ENABLE_MCO
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#define CONFIG_CLOCK_ENABLE_MCO 0 /* Don't enable MCO by default */
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#endif
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/* Configure the MCO clock source: options are PLLCLK (default), HSE, HSI, LSE, LSI or SYSCLK*/
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#ifndef CONFIG_CLOCK_MCO_USE_PLLCLK
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK)
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#define CONFIG_CLOCK_MCO_USE_PLLCLK 0
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#else
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#define CONFIG_CLOCK_MCO_USE_PLLCLK 1 /* Use PLLCLK by default */
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#endif
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#endif /* CONFIG_CLOCK_MCO_USE_PLLCLK */
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#ifndef CONFIG_CLOCK_MCO_USE_HSE
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#define CONFIG_CLOCK_MCO_USE_HSE 0
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#endif /* CONFIG_CLOCK_MCO_USE_HSE */
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#ifndef CONFIG_CLOCK_MCO_USE_HSI
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#define CONFIG_CLOCK_MCO_USE_HSI 0
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#endif /* CONFIG_CLOCK_MCO_USE_HSI */
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#ifndef CONFIG_CLOCK_MCO_USE_LSE
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#define CONFIG_CLOCK_MCO_USE_LSE 0
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#endif /* CONFIG_CLOCK_MCO_USE_LSE */
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#ifndef CONFIG_CLOCK_MCO_USE_LSI
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#define CONFIG_CLOCK_MCO_USE_LSI 0
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#endif /* CONFIG_CLOCK_MCO_USE_LSI */
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#ifndef CONFIG_CLOCK_MCO_USE_MSI
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#define CONFIG_CLOCK_MCO_USE_MSI 0
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#endif /* CONFIG_CLOCK_MCO_USE_MSI */
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#ifndef CONFIG_CLOCK_MCO_USE_SYSCLK
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#define CONFIG_CLOCK_MCO_USE_SYSCLK 0
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#endif /* CONFIG_CLOCK_MCO_USE_SYSCLK */
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK) && \
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(IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK))
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#error "Cannot use PLLCLK as MCO clock source with other clocks"
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#endif
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) && \
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(IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK))
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#error "Cannot use HSE as MCO clock source with other clocks"
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#endif
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) && \
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(IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK))
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#error "Cannot use HSI as MCO clock source with other clocks"
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#endif
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) && \
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(IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK))
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#error "Cannot use LSE as MCO clock source with other clocks"
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#endif
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) && \
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(IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK))
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#error "Cannot use LSI as MCO clock source with other clocks"
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#endif
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) && \
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(IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLL) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK))
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#error "Cannot use MSI as MCO clock source with other clocks"
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#endif
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK) && \
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(IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI) || \
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IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI) || IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK))
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#error "Cannot use SYSCLK as MCO clock source with other clocks"
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#endif
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#if IS_ACTIVE(CONFIG_CLOCK_MCO_USE_SYSCLK)
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#define CLOCK_MCO_SRC (RCC_CFGR_MCOSEL_0)
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#elif IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI)
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#define CLOCK_MCO_SRC (RCC_CFGR_MCOSEL_1)
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#elif IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI)
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#define CLOCK_MCO_SRC (RCC_CFGR_MCOSEL_1 | RCC_CFGR_MCOSEL_0)
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#elif IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE)
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#define CLOCK_MCO_SRC (RCC_CFGR_MCOSEL_2)
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#elif IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK)
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#define CLOCK_MCO_SRC (RCC_CFGR_MCOSEL_2 | RCC_CFGR_MCOSEL_0)
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#elif IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI)
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#define CLOCK_MCO_SRC (RCC_CFGR_MCOSEL_2 | RCC_CFGR_MCOSEL_1)
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#elif IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE)
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#define CLOCK_MCO_SRC (RCC_CFGR_MCOSEL_2 | RCC_CFGR_MCOSEL_1 | RCC_CFGR_MCOSEL_0)
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#else
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#error "Invalid MCO clock source selection"
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#endif
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/* Configure the MCO prescaler: valid values are 1, 2, 4, 8, 16 */
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#ifndef CONFIG_CLOCK_MCO_PRE
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#define CONFIG_CLOCK_MCO_PRE (1)
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#endif
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#ifdef CPU_FAM_STM32WB
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/* Define bitfields for MCO prescaler for compatibility with L4*/
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#define RCC_CFGR_MCOPRE_DIV1 (0)
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#define RCC_CFGR_MCOPRE_DIV2 (RCC_CFGR_MCOPRE_0)
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#define RCC_CFGR_MCOPRE_DIV4 (RCC_CFGR_MCOPRE_1)
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#define RCC_CFGR_MCOPRE_DIV8 (RCC_CFGR_MCOPRE_1 | RCC_CFGR_MCOPRE_0)
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#define RCC_CFGR_MCOPRE_DIV16 (RCC_CFGR_MCOPRE_2)
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#endif /* CPU_FAM_STM32WB */
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#if CONFIG_CLOCK_MCO_PRE == 1
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#define CLOCK_MCO_PRE (RCC_CFGR_MCOPRE_DIV1)
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#elif CONFIG_CLOCK_MCO_PRE == 2
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#define CLOCK_MCO_PRE (RCC_CFGR_MCOPRE_DIV2)
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#elif CONFIG_CLOCK_MCO_PRE == 4
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#define CLOCK_MCO_PRE (RCC_CFGR_MCOPRE_DIV4)
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#elif CONFIG_CLOCK_MCO_PRE == 8
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#define CLOCK_MCO_PRE (RCC_CFGR_MCOPRE_DIV8)
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#elif CONFIG_CLOCK_MCO_PRE == 16
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#define CLOCK_MCO_PRE (RCC_CFGR_MCOPRE_DIV16)
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#else
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#error "Invalid MCO prescaler"
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#endif
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/* Configure main and peripheral bus clock prescalers */
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#if defined(CPU_FAM_STM32WB)
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#define CLOCK_AHB_DIV (0)
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@ -221,9 +359,11 @@
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/* Check if PLL is required
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- When used as system clock
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- When PLLQ is used as 48MHz clock source
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- When PLLCLK is used as MCO clock source
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*/
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#if IS_ACTIVE(CONFIG_USE_CLOCK_PLL) || \
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(IS_ACTIVE(CLOCK_ENABLE_48MHZ) && IS_ACTIVE(CLOCK48MHZ_USE_PLLQ))
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(IS_ACTIVE(CLOCK_ENABLE_48MHZ) && IS_ACTIVE(CLOCK48MHZ_USE_PLLQ)) || \
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(IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO) && IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK))
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#define CLOCK_ENABLE_PLL 1
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#else
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#define CLOCK_ENABLE_PLL 0
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@ -234,7 +374,8 @@
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- When used as PLL input clock
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*/
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSE) || \
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(IS_ACTIVE(CLOCK_ENABLE_PLL) && IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE))
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(IS_ACTIVE(CLOCK_ENABLE_PLL) && IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSE)) || \
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(IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO) && IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSE))
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#define CLOCK_ENABLE_HSE 1
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#else
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#define CLOCK_ENABLE_HSE 0
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@ -250,12 +391,27 @@
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- When used as PLL input clock
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*/
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) || \
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(IS_ACTIVE(CLOCK_ENABLE_PLL) && IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSI))
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(IS_ACTIVE(CLOCK_ENABLE_PLL) && IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_HSI)) || \
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(IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO) && IS_ACTIVE(CONFIG_CLOCK_MCO_USE_HSI))
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#define CLOCK_ENABLE_HSI 1
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#else
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#define CLOCK_ENABLE_HSI 0
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#endif
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/* Check whether LSE must be enabled */
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#if IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO) && IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSE)
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#define CLOCK_ENABLE_LSE 1
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#else
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#define CLOCK_ENABLE_LSE 0
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#endif
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/* Check whether LSI must be enabled */
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#if IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO) && IS_ACTIVE(CONFIG_CLOCK_MCO_USE_LSI)
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#define CLOCK_ENABLE_LSI 1
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#else
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#define CLOCK_ENABLE_LSI 0
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#endif
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/* Check if MSI is required
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- When used as system clock
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- When used as PLL input clock
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@ -263,6 +419,7 @@
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*/
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#if IS_ACTIVE(CONFIG_USE_CLOCK_MSI) || \
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(IS_ACTIVE(CLOCK_ENABLE_PLL) && IS_ACTIVE(CONFIG_CLOCK_PLL_SRC_MSI)) || \
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(IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO) && IS_ACTIVE(CONFIG_CLOCK_MCO_USE_MSI)) || \
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(IS_ACTIVE(CLOCK_ENABLE_48MHZ) && IS_ACTIVE(CLOCK48MHZ_USE_MSI))
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#define CLOCK_ENABLE_MSI 1
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#else
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@ -351,8 +508,10 @@ void stmclk_init_sysclk(void)
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/* now we can safely configure and start the PLL */
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RCC->PLLCFGR = (PLL_SRC | PLL_M | PLL_N | PLL_R | PLL_Q);
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if (IS_ACTIVE(CONFIG_USE_CLOCK_PLL)) {
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/* Enable PLLCLK if PLL is used as system clock */
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if (IS_ACTIVE(CONFIG_USE_CLOCK_PLL) ||
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(IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO) && IS_ACTIVE(CONFIG_CLOCK_MCO_USE_PLLCLK))) {
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/* Enable PLLCLK if PLL is used as system clock or when PLLCLK is
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used MCO clock source */
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RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN;
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}
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@ -425,5 +584,42 @@ void stmclk_init_sysclk(void)
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}
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}
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/* Enable the LSE if required for MCO.
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* If available on the board, LSE might also be initialized for RTT/RTC
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* peripherals. For the monent, this initialization is done in the
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* corresponding peripheral drivers. */
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if (IS_ACTIVE(CLOCK_ENABLE_LSE)) {
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stmclk_dbp_unlock();
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RCC->BDCR |= RCC_BDCR_LSEON;
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while (!(RCC->BDCR & RCC_BDCR_LSERDY)) {}
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stmclk_dbp_lock();
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}
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/* Enable the LSI if required for MCO
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* If no LSE is available on the board, LSI might also be initialized for
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* RTT/RTC peripherals. For the monent, this initialization is done in the
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* corresponding peripheral drivers. */
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if (IS_ACTIVE(CLOCK_ENABLE_LSI)) {
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#if defined(CPU_FAM_STM32WB)
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RCC->CSR |= RCC_CSR_LSI1ON;
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while (!(RCC->CSR & RCC_CSR_LSI1RDY)) {}
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#else
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RCC->CSR |= RCC_CSR_LSION;
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while (!(RCC->CSR & RCC_CSR_LSIRDY)) {}
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#endif
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}
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/* Configure MCO */
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if (IS_ACTIVE(CONFIG_CLOCK_ENABLE_MCO)) {
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/* As stated in the manual, it is highly recommended to change the MCO
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prescaler before enabling the MCO */
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RCC->CFGR |= CLOCK_MCO_PRE;
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RCC->CFGR |= CLOCK_MCO_SRC;
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/* Configure MCO pin (PA8 with AF0) */
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gpio_init(GPIO_PIN(PORT_A, 8), GPIO_OUT);
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gpio_init_af(GPIO_PIN(PORT_A, 8), GPIO_AF0);
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}
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irq_restore(is);
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}
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