From f13ef5f500a87f70310c8bc8c2effb4b64e31576 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Mon, 1 Apr 2013 00:18:07 +0200 Subject: [PATCH 01/21] * restructured cpu folder to distinguish between arm and lpc common files --- Makefile.include | 4 +++- Makefile.modules | 21 +------------------- cpu/Makefile | 10 ++++++++-- cpu/Makefile.include | 21 ++++++++++++++++++++ cpu/arm_common/arm_cpu.c | 3 +++ cpu/lpc_common/Makefile | 4 ++++ cpu/{arm_common => lpc_common}/hwtimer_cpu.c | 0 cpu/{arm_common => lpc_common}/iap.c | 2 +- 8 files changed, 41 insertions(+), 24 deletions(-) create mode 100644 cpu/Makefile.include create mode 100644 cpu/lpc_common/Makefile rename cpu/{arm_common => lpc_common}/hwtimer_cpu.c (100%) rename cpu/{arm_common => lpc_common}/iap.c (99%) diff --git a/Makefile.include b/Makefile.include index e5fadea984..0ba16357ea 100644 --- a/Makefile.include +++ b/Makefile.include @@ -1,3 +1,4 @@ +# set undefined variables ifeq ($(strip $(RIOTCPU)),) export RIOTCPU =$(RIOTBASE)/cpu endif @@ -11,8 +12,9 @@ BB = $(shell echo $(BOARD)|tr 'a-z' 'A-Z') CFLAGS += -DBOARD=$(BB) export CFLAGS -# mandatory include! +# mandatory includes! include $(RIOTBOARD)/$(BOARD)/Makefile.include +include $(RIOTCPU)/Makefile.include include $(RIOTBASE)/Makefile.modules # your binaries to link diff --git a/Makefile.modules b/Makefile.modules index 7db7896173..233f0416f2 100644 --- a/Makefile.modules +++ b/Makefile.modules @@ -1,26 +1,7 @@ export MAKEBASE =$(RIOTBASE) export BINDIR =$(RIOTBASE)/bin/ -UNDEF = $(BINDIR)startup.o +UNDEF += $(BINDIR)startup.o -### Minimal setup -ifeq ($(CPU),lpc2387) - USEMODULE += arm_common - UNDEF += $(BINDIR)syscalls.o - export INCLUDES += -I$(RIOTBASE)/cpu/arm_common/include -endif -ifeq ($(CPU),lpc214x) - USEMODULE += arm_common - UNDEF += $(BINDIR)syscalls.o -endif -ifeq ($(CPU),native) - export INCLUDES += -I$(RIOTBASE)/cpu/native/include -endif -ifeq ($(CPU),stm32f407vgt6) - USEMODULE += stm32f4xxstdperi - UNDEF += $(BINDIR)syscalls.o -endif - -#USEMODULE += cpu_drivers cpu core lib sys USEMODULE += cpu core sys ED = $(USEMODULE:%=-DMODULE_%) EXTDEFINES = $(shell echo $(ED)|tr 'a-z' 'A-Z') diff --git a/cpu/Makefile b/cpu/Makefile index b0f6e8f4df..19c8c89533 100644 --- a/cpu/Makefile +++ b/cpu/Makefile @@ -1,9 +1,13 @@ ifeq ($(CPU),lpc2387) - DIRS = arm_common lpc2387 + DIRS = arm_common lpc_common lpc2387 endif ifeq ($(CPU),lpc214x) - DIRS = arm_common lpc214x + DIRS = arm_common lpc_common lpc214x +endif + +ifeq ($(CPU),mc1322x) + DIRS = arm_common mc1322x endif ifeq ($(CPU),cc430) @@ -28,6 +32,8 @@ $(DIRS): clean: @$(MAKE) -C lpc2387 clean + @$(MAKE) -C mc1322x clean + @$(MAKE) -C lpc_common clean @$(MAKE) -C arm_common clean @$(MAKE) -C cc430 clean @$(MAKE) -C msp430-common clean diff --git a/cpu/Makefile.include b/cpu/Makefile.include new file mode 100644 index 0000000000..968ca3812b --- /dev/null +++ b/cpu/Makefile.include @@ -0,0 +1,21 @@ +### Minimal setup +ifeq ($(CPU),lpc2387) + export USEMODULE += arm_common lpc_common + export UNDEF += $(BINDIR)syscalls.o + export INCLUDES += -I$(RIOTCPU)/arm_common/include + export INCLUDES += -I$(RIOTCPU)/lpc_common/include +endif +ifeq ($(CPU),lpc214x) + export USEMODULE += arm_common lpc_common + export UNDEF += $(BINDIR)syscalls.o + export INCLUDES += -I$(RIOTCPU)/arm_common/include + export INCLUDES += -I$(RIOTCPU)/lpc_common/include +endif +ifeq ($(CPU),mc1322x) + export USEMODULE += arm_common + export UNDEF += $(BINDIR)syscalls.o + export INCLUDES += -I$(RIOTBASE)/cpu/arm_common/include +endif +ifeq ($(CPU),native) + export INCLUDES += -I$(RIOTBASE)/cpu/native/include +endif diff --git a/cpu/arm_common/arm_cpu.c b/cpu/arm_common/arm_cpu.c index 36ee390405..97d3d13d38 100644 --- a/cpu/arm_common/arm_cpu.c +++ b/cpu/arm_common/arm_cpu.c @@ -86,6 +86,8 @@ void thread_print_stack(void) printf("STACK (%u)= %X \n",i,*s); } +/* LPC specific */ +#ifdef WDTC __attribute__((naked,noreturn)) void arm_reset(void) { dINT(); @@ -95,3 +97,4 @@ __attribute__((naked,noreturn)) void arm_reset(void) WDFEED= 0x55; while(1); } +#endif diff --git a/cpu/lpc_common/Makefile b/cpu/lpc_common/Makefile new file mode 100644 index 0000000000..b8ccbfb0ef --- /dev/null +++ b/cpu/lpc_common/Makefile @@ -0,0 +1,4 @@ +MODULE =lpc_common + +include $(RIOTBASE)/Makefile.base + diff --git a/cpu/arm_common/hwtimer_cpu.c b/cpu/lpc_common/hwtimer_cpu.c similarity index 100% rename from cpu/arm_common/hwtimer_cpu.c rename to cpu/lpc_common/hwtimer_cpu.c diff --git a/cpu/arm_common/iap.c b/cpu/lpc_common/iap.c similarity index 99% rename from cpu/arm_common/iap.c rename to cpu/lpc_common/iap.c index 0f0b418abe..0e67f23589 100644 --- a/cpu/arm_common/iap.c +++ b/cpu/lpc_common/iap.c @@ -1,13 +1,13 @@ /* iap driver * * based on iap driver for LPC2148 Controller made by Andreas Weschenfelder, 2008 - * see: * */ #include #include #include +/* TODO: replace by a lpc generic header */ #include //#define ENABLE_DEBUG From efd73d735b2a3859f853694e226e6f38052dd7f5 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Mon, 1 Apr 2013 00:18:52 +0200 Subject: [PATCH 02/21] * initial not yet compiling(!) support for mc1322x --- cpu/mc1322x/Makefile | 12 ++ cpu/mc1322x/include/cpu-conf.h | 61 ++++++++ cpu/mc1322x/include/cpu.h | 16 ++ cpu/mc1322x/mc1322x.lds | 269 +++++++++++++++++++++++++++++++++ cpu/mc1322x/start.s | 190 +++++++++++++++++++++++ 5 files changed, 548 insertions(+) create mode 100644 cpu/mc1322x/Makefile create mode 100644 cpu/mc1322x/include/cpu-conf.h create mode 100644 cpu/mc1322x/include/cpu.h create mode 100644 cpu/mc1322x/mc1322x.lds create mode 100644 cpu/mc1322x/start.s diff --git a/cpu/mc1322x/Makefile b/cpu/mc1322x/Makefile new file mode 100644 index 0000000000..431b3b75bb --- /dev/null +++ b/cpu/mc1322x/Makefile @@ -0,0 +1,12 @@ +MODULE =cpu + +DIRS = + +all: $(BINDIR)$(MODULE).a + @for i in $(DIRS) ; do $(MAKE) -C $$i ; done ; + +include $(RIOTBASE)/Makefile.base + +clean:: + @for i in $(DIRS) ; do $(MAKE) -C $$i clean ; done ; + diff --git a/cpu/mc1322x/include/cpu-conf.h b/cpu/mc1322x/include/cpu-conf.h new file mode 100644 index 0000000000..3c0540d304 --- /dev/null +++ b/cpu/mc1322x/include/cpu-conf.h @@ -0,0 +1,61 @@ +/* + * cpu.h - mc1322x specific definitions + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT + */ + +#ifndef CPUCONF_H_ +#define CPUCONF_H_ + +/** + * @ingroup conf + * @ingroup mc1322x + * + * @{ + */ + +/** + * @file + * @brief MC1322X CPUconfiguration + * + * @author Oleg Hahm + */ + +/** + * @name Stdlib configuration + * @{ + */ +#define __FOPEN_MAX__ 4 +#define __FILENAME_MAX__ 12 +/** @} */ + +/** + * @name Kernel configuration + * @{ + */ +#ifndef KERNEL_CONF_STACKSIZE_DEFAULT +#define KERNEL_CONF_STACKSIZE_DEFAULT 4500 +#endif + +#define KERNEL_CONF_STACKSIZE_IDLE 500 +/** @} */ + +/** + * @name Compiler specifics + * @{ + */ +#define CC_CONF_INLINE inline +#define CC_CONF_USED __attribute__((used)) +#define CC_CONF_NONNULL(...) __attribute__((nonnull(__VA_ARGS__))) +#define CC_CONF_WARN_UNUSED_RESULT __attribute__((warn_unused_result)) +/** @} */ + +#define TRANSCEIVER_BUFFER_SIZE (10) +#define RX_BUF_SIZE (10) + +/** @} */ +#endif /* CPUCONF_H_ */ diff --git a/cpu/mc1322x/include/cpu.h b/cpu/mc1322x/include/cpu.h new file mode 100644 index 0000000000..511790695b --- /dev/null +++ b/cpu/mc1322x/include/cpu.h @@ -0,0 +1,16 @@ +/* + * cpu.h - mc1322x specific definitions + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + */ + +#ifndef CPU_H +#define CPU_H + +#include + +extern uintptr_t __stack_start; ///< end of user stack memory space + +#endif /* CPU_H */ diff --git a/cpu/mc1322x/mc1322x.lds b/cpu/mc1322x/mc1322x.lds new file mode 100644 index 0000000000..95fcb26658 --- /dev/null +++ b/cpu/mc1322x/mc1322x.lds @@ -0,0 +1,269 @@ +/* Script for -z combreloc: combine and sort reloc sections */ +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", + "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) + +MEMORY + { + ram (rwx) : org = 0x00400000, l = 96K + } + +SECTIONS +{ + +SYS_STACK_SIZE = 1024; +IRQ_STACK_SIZE = 256; +FIQ_STACK_SIZE = 256; +SVC_STACK_SIZE = 256; +ABT_STACK_SIZE = 16; +UND_STACK_SIZE = 16; +HEAP_SIZE = 4096; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x00400000); . = 0x00400000; + .text : + { + *(.start) + *(.irq) + *(.text .stub .text.* .gnu.linkonce.t.*) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + } =0 + + .interp : { *(.interp) } + .note.gnu.build-id : { *(.note.gnu.build-id) } + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.dyn : + { + *(.rel.init) + *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) + *(.rel.fini) + *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) + *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*) + *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) + *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) + *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) + *(.rel.ctors) + *(.rel.dtors) + *(.rel.got) + *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) + } + .rela.dyn : + { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : + { + KEEP (*(.init)) + } =0 + .plt : { *(.plt) } + .fini : + { + KEEP (*(.fini)) + } =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } + .rodata1 : { *(.rodata1) } + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + +/* . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE)); */ + + . = ALIGN(4); + . = DATA_SEGMENT_ALIGN(4,4); + + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + } + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. 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Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. + FIXME: Why do we need it? When there is no .bss section, we don't + pad the .data section. */ + . = ALIGN(. != 0 ? 32 / 8 : 1); + } + _bss_end__ = . ; __bss_end__ = . ; + . = ALIGN(32 / 8); + + .heap : { + __heap_start__ = . ; PROVIDE(__HEAP_START = .); + *(.heap); + . += HEAP_SIZE; + . = ALIGN (4); + __heap_end__ = . ; PROVIDE(__HEAP_END = .); + } + + + . = ALIGN(32 / 8); + __end__ = . ; + _end = .; PROVIDE (end = .); + . = DATA_SEGMENT_END (.); + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) } +} diff --git a/cpu/mc1322x/start.s b/cpu/mc1322x/start.s new file mode 100644 index 0000000000..0d0e6ab952 --- /dev/null +++ b/cpu/mc1322x/start.s @@ -0,0 +1,190 @@ +/* + * Copyright (c) 2010, Mariano Alvira and other contributors + * to the MC1322x project (http://mc1322x.devl.org) and Contiki. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the Contiki OS. + * + * + */ + + +/* +The following lincence is for all parts of this code done by +Martin Thomas. Code from others used here may have other license terms. + +Copyright (C) 2004 Martin THOMAS + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of +the Software, and to permit persons to whom the Software is furnished to do so, +subject to the following conditions: + +! The above copyright notice and this permission notice shall be included in all +! copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +// Stack Sizes + .set UND_STACK_SIZE, 0x00000004 + .set ABT_STACK_SIZE, 0x00000004 + .set FIQ_STACK_SIZE, 0x00000004 + .set IRQ_STACK_SIZE, 0X00000080 + .set SVC_STACK_SIZE, 0x00000004 + +// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs + .set MODE_USR, 0x10 // User Mode + .set MODE_FIQ, 0x11 // FIQ Mode + .set MODE_IRQ, 0x12 // IRQ Mode + .set MODE_SVC, 0x13 // Supervisor Mode + .set MODE_ABT, 0x17 // Abort Mode + .set MODE_UND, 0x1B // Undefined Mode + .set MODE_SYS, 0x1F // System Mode + + .equ I_BIT, 0x80 // when I bit is set, IRQ is disabled + .equ F_BIT, 0x40 // when F bit is set, FIQ is disabled + + .section .start + + .set _rom_data_init, 0x108d0 + .global _start +_start: + b _begin // reset - _start + ldr pc,_undf // undefined + ldr pc,_swi // SWI + ldr pc,_pabt // program abort + ldr pc,_dabt // data abort + nop // reserved + ldr pc,_irq // IRQ + ldr pc,_fiq // FIQ + + /* these vectors are used for rom patching */ +.org 0x20 +.code 16 +_RPTV_0_START: + bx lr /* do nothing */ + +.org 0x60 +_RPTV_1_START: + bx lr /* do nothing */ + +.org 0xa0 +_RPTV_2_START: + bx lr /* do nothing */ + +.org 0xe0 +_RPTV_3_START: + bx lr /* do nothing */ + +.org 0x120 +ROM_var_start: .word 0 +.org 0x7ff +ROM_var_end: .word 0 + +.code 32 +.align +_begin: + /* FIQ mode stack */ + msr CPSR_c, #(MODE_FIQ | I_BIT | F_BIT) + ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */ + + /* IRQ mode stack */ + msr CPSR_c, #(MODE_IRQ | I_BIT | F_BIT) + ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */ + + /* Supervisor mode stack */ + msr CPSR_c, #(MODE_SVC | I_BIT | F_BIT) + ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */ + + /* Undefined mode stack */ + msr CPSR_c, #(MODE_UND | I_BIT | F_BIT) + ldr sp, =__und_stack_top__ /* set the UND stack pointer */ + + /* Abort mode stack */ + msr CPSR_c, #(MODE_ABT | I_BIT | F_BIT) + ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */ + + /* System mode stack */ + msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT) + ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */ + + /* call the rom_data_init function in ROM */ + /* initializes ROM_var space defined by ROM_var_start and ROM_var_end */ + /* this area is used by ROM functions (e.g. nvm_read) */ + ldr r12,=_rom_data_init + mov lr,pc + bx r12 + + msr CPSR_c, #(MODE_SYS) + + /* Clear BSS */ +clear_bss: + ldr r0, _bss_start /* find start of bss segment */ + ldr r1, _bss_end /* stop here */ + mov r2, #0x00000000 /* clear */ +clbss_l: + str r2, [r0] /* clear loop... */ + add r0, r0, #4 + cmp r0, r1 + blt clbss_l + + b main + +_undf: .word __undf // undefined +_swi: .word __swi // SWI +_pabt: .word __pabt // program abort +_dabt: .word __dabt // data abort +_irq: .word irq // IRQ +_fiq: .word __fiq // FIQ + +__undf: b . // undefined +__swi: b . // SWI +__pabt: b . // program abort +__dabt: b . // data abort +/* IRQ handler set in isr.c */ +//__irq: b . // IRQ +__fiq: b . // FIQ + +/* + * These are defined in the board-specific linker script. + */ +.globl _bss_start +_bss_start: + .word __bss_start + + .globl _bss_end +_bss_end: + .word _end From cc68d7caa617466b641995631ea1d3261cfb1b8c Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Mon, 1 Apr 2013 00:46:17 +0200 Subject: [PATCH 03/21] * assuming size_t to be always unsigned --- cpu/arm_common/syscalls.c | 41 +++++++++++++-------------------------- 1 file changed, 13 insertions(+), 28 deletions(-) diff --git a/cpu/arm_common/syscalls.c b/cpu/arm_common/syscalls.c index 7db1236510..83d6d7084c 100644 --- a/cpu/arm_common/syscalls.c +++ b/cpu/arm_common/syscalls.c @@ -1,27 +1,17 @@ -/****************************************************************************** -Copyright 2008, Freie Universitaet Berlin (FUB). All rights reserved. - -These sources were developed at the Freie Universitaet Berlin, Computer Systems -and Telematics group (http://cst.mi.fu-berlin.de). -------------------------------------------------------------------------------- -This file is part of RIOT. - -This program is free software: you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free Software -Foundation, either version 3 of the License, or (at your option) any later -version. - -RIOT is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS -FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along with -this program. If not, see http://www.gnu.org/licenses/ . -*******************************************************************************/ +/* + * syscalls.c - arm system calls + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT. + * + */ /** * @file - * @ingroup lpc2387 + * @ingroup arm_common * @brief LPC2387 NewLib system calls implementation * * @author Michael Baar @@ -35,6 +25,8 @@ this program. If not, see http://www.gnu.org/licenses/ . #include #include #include + +#include "arm_cpu.h" // core #include "kernel.h" #include "irq.h" @@ -109,13 +101,6 @@ void __assert(const char *file, int line, const char *failedexpr) /*-----------------------------------------------------------------------------------*/ caddr_t _sbrk_r(struct _reent *r, size_t incr) { - if(incr < 0) - { - puts("[syscalls] Negative Values for _sbrk_r are not supported"); - r->_errno = ENOMEM; - return NULL; - } - uint32_t cpsr = disableIRQ(); /* check all heaps for a chunk of the requested size */ From 5ae8c46c883210b30e1181dc1c11655c71d54bc8 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Mon, 1 Apr 2013 02:10:26 +0200 Subject: [PATCH 04/21] * moved profiling code to lpc specific part and added includes to cpu Makefile --- cpu/Makefile.base | 6 ++++++ cpu/{arm_common => lpc_common}/profiling.c | 0 2 files changed, 6 insertions(+) rename cpu/{arm_common => lpc_common}/profiling.c (100%) diff --git a/cpu/Makefile.base b/cpu/Makefile.base index 4772bde338..bdac81639b 100644 --- a/cpu/Makefile.base +++ b/cpu/Makefile.base @@ -1,11 +1,17 @@ ifeq ($(CPU),lpc2387) INCLUDES += -I$(MAKEBASE)/cpu/arm_common/include/ + INCLUDES += -I$(MAKEBASE)/cpu/lpc_common/include/ INCLUDES += -I$(MAKEBASE)/cpu/lpc2387/include endif ifeq ($(CPU),lpc214x) INCLUDES += -I$(MAKEBASE)/cpu/arm_common/include/ + INCLUDES += -I$(MAKEBASE)/cpu/lpc_common/include/ INCLUDES += -I$(MAKEBASE)/cpu/lpc214x/include endif +ifeq ($(CPU),mc1322x) + INCLUDES += -I$(MAKEBASE)/cpu/arm_common/include/ + INCLUDES += -I$(MAKEBASE)/cpu/mc1322x/include +endif ifeq ($(CPU),msp430x16x) INCLUDES += -I$(MAKEBASE)/cpu/msp430-common/include/ INCLUDES += -I$(MAKEBASE)/cpu/msp430x16x/include/ diff --git a/cpu/arm_common/profiling.c b/cpu/lpc_common/profiling.c similarity index 100% rename from cpu/arm_common/profiling.c rename to cpu/lpc_common/profiling.c From 2177b130d76c8f2fb5e35db1ef05ba8f02b76a70 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Mon, 1 Apr 2013 02:11:43 +0200 Subject: [PATCH 05/21] * added header and preliminary hwtimer code for mc1322x * renamed start to startup --- cpu/mc1322x/hwtimer_cpu.c | 44 ++++++ cpu/mc1322x/include/cpu.h | 1 + cpu/mc1322x/include/mc1322x.h | 210 +++++++++++++++++++++++++++++ cpu/mc1322x/mc1322x.lds | 4 +- cpu/mc1322x/{start.s => startup.s} | 66 ++++----- 5 files changed, 290 insertions(+), 35 deletions(-) create mode 100644 cpu/mc1322x/hwtimer_cpu.c create mode 100644 cpu/mc1322x/include/mc1322x.h rename cpu/mc1322x/{start.s => startup.s} (73%) diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c new file mode 100644 index 0000000000..e8da91b6c5 --- /dev/null +++ b/cpu/mc1322x/hwtimer_cpu.c @@ -0,0 +1,44 @@ +/* + * hwtimer_cpu.c - architecture dependent hardware timer functionality + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT. + */ + +#include +#include "mc1322x.h" + +/* TODO: do scaling voodoo */ +#define COUNT_MODE 1 /* use rising edge of primary source */ +#define PRIME_SRC 0xf /* Perip. clock with 128 prescale (for 24Mhz = 187500Hz)*/ +#define SEC_SRC 0 /* don't need this */ +#define ONCE 0 /* keep counting */ +#define LEN 0 /* continue counting */ +#define DIR 0 /* count up */ +#define CO_INIT 0 /* other counters cannot force a re-initialization of this counter */ +#define OUT_MODE 0 /* OFLAG is asserted while counter is active */ + +void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { + /* Reset the timer */ + TMR_ENBL = 0; + /* Clear status */ + TMR0_SCTRL = 0; + /* disable interrupt */ + TMR0_CSCTRL =0x0000; + /* Reload/initialize to zero */ + TMR0_LOAD = 0; + + /* disable comparison */ + TMR0_COMP_UP = 0; + TMR0_CMPLD1 = 0; + + /* set counter to zero */ + TMR0_CNTR = 0; + + TMR0_CTRL = (COUNT_MODE<<13) | (PRIME_SRC<<9) | (SEC_SRC<<7) | (ONCE<<6) | (LEN<<5) | (DIR<<4) | (CO_INIT<<3) | (OUT_MODE); + TMR_ENBL = 0xf; /* enable all the timers --- why not? */ + +} diff --git a/cpu/mc1322x/include/cpu.h b/cpu/mc1322x/include/cpu.h index 511790695b..7d9adfbcdf 100644 --- a/cpu/mc1322x/include/cpu.h +++ b/cpu/mc1322x/include/cpu.h @@ -10,6 +10,7 @@ #define CPU_H #include +#include "mc1322x.h" extern uintptr_t __stack_start; ///< end of user stack memory space diff --git a/cpu/mc1322x/include/mc1322x.h b/cpu/mc1322x/include/mc1322x.h new file mode 100644 index 0000000000..6c91b5ec49 --- /dev/null +++ b/cpu/mc1322x/include/mc1322x.h @@ -0,0 +1,210 @@ +/* + * mc1322x.h - mc1322x specific definitions + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT. + */ + +#ifndef MC1322X_H +#define MC1322X_H + +#define F_CPU (24000000) ///< CPU target speed in Hz + +/* Timer registers are all 16-bit wide with 16-bit access only */ +#define TMR_OFFSET (0x20) +#define TMR_BASE (0x80007000) +#define TMR0_BASE (TMR_BASE) +#define TMR1_BASE (TMR_BASE + TMR_OFFSET*1) +#define TMR2_BASE (TMR_BASE + TMR_OFFSET*2) +#define TMR3_BASE (TMR_BASE + TMR_OFFSET*3) + +/* Structure-based register definitions */ +/* Example use: + TMR2->CTRL = 0x1234; + TMR2->CTRLbits = (struct TMR_CTRL) { + .DIR = 1, + .OUTPUT_MODE = 2, + }; + TMR2->CTRLbits.PRIMARY_CNT_SOURCE = 3; +*/ + +struct TMR_struct { + uint16_t COMP1; + uint16_t COMP2; + uint16_t CAPT; + uint16_t LOAD; + uint16_t HOLD; + uint16_t CNTR; + union { + uint16_t CTRL; + struct TMR_CTRL { + uint16_t OUTPUT_MODE:3; + uint16_t CO_INIT:1; + uint16_t DIR:1; + uint16_t LENGTH:1; + uint16_t ONCE:1; + uint16_t SECONDARY_CNT_SOURCE:2; + uint16_t PRIMARY_CNT_SOURCE:4; + uint16_t COUNT_MODE:3; + } CTRLbits; + }; + union { + uint16_t SCTRL; + struct TMR_SCTRL { + uint16_t OEN:1; + uint16_t OPS:1; + uint16_t FORCE:1; + uint16_t VAL:1; + uint16_t EEOF:1; + uint16_t MSTR:1; + uint16_t CAPTURE_MODE:2; + uint16_t INPUT:1; + uint16_t IPS:1; + uint16_t IEFIE:1; + uint16_t IEF:1; + uint16_t TOFIE:1; + uint16_t TOF:1; + uint16_t TCFIE:1; + uint16_t TCF:1; + } SCTRLbits; + }; + uint16_t CMPLD1; + uint16_t CMPLD2; + union { + uint16_t CSCTRL; + struct TMR_CSCTRL { + uint16_t CL1:2; + uint16_t CL2:2; + uint16_t TCF1:1; + uint16_t TCF2:1; + uint16_t TCF1EN:1; + uint16_t TCF2EN:1; + uint16_t :5; + uint16_t FILT_EN:1; + uint16_t DBG_EN:2; + } CSCTRLbits; + }; + + uint16_t reserved[4]; + + union { + uint16_t ENBL; + struct TMR_ENBL { + union { + struct { + uint16_t ENBL:4; + }; + struct { + uint16_t ENBL3:1; + uint16_t ENBL2:1; + uint16_t ENBL1:1; + uint16_t ENBL0:1; + }; + }; + uint16_t :12; + } ENBLbits; + }; +}; + +static volatile struct TMR_struct * const TMR0 = (void *) (TMR0_BASE); +static volatile struct TMR_struct * const TMR1 = (void *) (TMR1_BASE); +static volatile struct TMR_struct * const TMR2 = (void *) (TMR2_BASE); +static volatile struct TMR_struct * const TMR3 = (void *) (TMR3_BASE); + +/* Get timer pointer from timer number */ +#define TMR_ADDR(x) (*(volatile struct TMR_struct *)(((uint32_t)(x) * TMR_OFFSET) + TMR_BASE)) + +/* Get timer number from the timer pointer. */ +#define TMR_NUM(x) (((uint32_t)(x) - TMR_BASE) / TMR_OFFSET) + +/* Used to compute which enable bit to set for a particular timer, e.g. + TMR0.ENBL |= TMR_ENABLE_BIT(TMR2); + Helpful when you're using macros to define timers +*/ +#define TMR_ENABLE_BIT(x) (1 << TMR_NUM(x)) + +#define TMR0_PIN GPIO_08 +#define TMR1_PIN GPIO_09 +#define TMR2_PIN GPIO_10 +#define TMR3_PIN GPIO_11 + +#define TMR_REGOFF_COMP1 (0x0) +#define TMR_REGOFF_COMP2 (0x2) +#define TMR_REGOFF_CAPT (0x4) +#define TMR_REGOFF_LOAD (0x6) +#define TMR_REGOFF_HOLD (0x8) +#define TMR_REGOFF_CNTR (0xa) +#define TMR_REGOFF_CTRL (0xc) +#define TMR_REGOFF_SCTRL (0xe) +#define TMR_REGOFF_CMPLD1 (0x10) +#define TMR_REGOFF_CMPLD2 (0x12) +#define TMR_REGOFF_CSCTRL (0x14) +#define TMR_REGOFF_ENBL (0x1e) + +/* one enable register to rule them all */ +#define TMR_ENBL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_ENBL)) + +/* Timer 0 registers */ +#define TMR0_COMP1 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_COMP1)) +#define TMR0_COMP_UP TMR0_COMP1 +#define TMR0_COMP2 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_COMP2)) +#define TMR0_COMP_DOWN TMR0_COMP2 +#define TMR0_CAPT (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CAPT)) +#define TMR0_LOAD (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_LOAD)) +#define TMR0_HOLD (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_HOLD)) +#define TMR0_CNTR (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CNTR)) +#define TMR0_CTRL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CTRL)) +#define TMR0_SCTRL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_SCTRL)) +#define TMR0_CMPLD1 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CMPLD1)) +#define TMR0_CMPLD2 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CMPLD2)) +#define TMR0_CSCTRL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CSCTRL)) + +/* Timer 1 registers */ +#define TMR1_COMP1 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_COMP1)) +#define TMR1_COMP_UP TMR1_COMP1 +#define TMR1_COMP2 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_COMP2)) +#define TMR1_COMP_DOWN TMR1_COMP2 +#define TMR1_CAPT (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CAPT)) +#define TMR1_LOAD (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_LOAD)) +#define TMR1_HOLD (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_HOLD)) +#define TMR1_CNTR (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CNTR)) +#define TMR1_CTRL (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CTRL)) +#define TMR1_SCTRL (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_SCTRL)) +#define TMR1_CMPLD1 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CMPLD1)) +#define TMR1_CMPLD2 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CMPLD2)) +#define TMR1_CSCTRL (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CSCTRL)) + +/* Timer 2 registers */ +#define TMR2_COMP1 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_COMP1)) +#define TMR2_COMP_UP TMR2_COMP1 +#define TMR2_COMP2 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_COMP2)) +#define TMR2_COMP_DOWN TMR2_COMP2 +#define TMR2_CAPT (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CAPT)) +#define TMR2_LOAD (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_LOAD)) +#define TMR2_HOLD (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_HOLD)) +#define TMR2_CNTR (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CNTR)) +#define TMR2_CTRL (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CTRL)) +#define TMR2_SCTRL (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_SCTRL)) +#define TMR2_CMPLD1 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CMPLD1)) +#define TMR2_CMPLD2 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CMPLD2)) +#define TMR2_CSCTRL (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CSCTRL)) + +/* Timer 3 registers */ +#define TMR3_COMP1 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_COMP1)) +#define TMR3_COMP_UP TMR3_COMP1 +#define TMR3_COMP2 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_COMP2)) +#define TMR3_COMP_DOWN TMR3_COMP2 +#define TMR3_CAPT (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CAPT)) +#define TMR3_LOAD (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_LOAD)) +#define TMR3_HOLD (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_HOLD)) +#define TMR3_CNTR (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CNTR)) +#define TMR3_CTRL (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CTRL)) +#define TMR3_SCTRL (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_SCTRL)) +#define TMR3_CMPLD1 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CMPLD1)) +#define TMR3_CMPLD2 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CMPLD2)) +#define TMR3_CSCTRL (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CSCTRL)) +#define TMR(num, reg) CAT2(TMR,num,_##reg) +#endif /* MC1322X_H */ diff --git a/cpu/mc1322x/mc1322x.lds b/cpu/mc1322x/mc1322x.lds index 95fcb26658..fac0152494 100644 --- a/cpu/mc1322x/mc1322x.lds +++ b/cpu/mc1322x/mc1322x.lds @@ -2,7 +2,7 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") OUTPUT_ARCH(arm) -ENTRY(_start) +ENTRY(_startup) MEMORY { @@ -24,7 +24,7 @@ HEAP_SIZE = 4096; PROVIDE (__executable_start = 0x00400000); . = 0x00400000; .text : { - *(.start) + *(.startup) *(.irq) *(.text .stub .text.* .gnu.linkonce.t.*) /* .gnu.warning sections are handled specially by elf32.em. */ diff --git a/cpu/mc1322x/start.s b/cpu/mc1322x/startup.s similarity index 73% rename from cpu/mc1322x/start.s rename to cpu/mc1322x/startup.s index 0d0e6ab952..96440f5eca 100644 --- a/cpu/mc1322x/start.s +++ b/cpu/mc1322x/startup.s @@ -1,6 +1,6 @@ /* * Copyright (c) 2010, Mariano Alvira and other contributors - * to the MC1322x project (http://mc1322x.devl.org) and Contiki. + * to the MC1322x project (http:/*mc1322x.devl.org) and Contiki. * * All rights reserved. * @@ -58,38 +58,38 @@ IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -// Stack Sizes +/* Stack Sizes */ .set UND_STACK_SIZE, 0x00000004 .set ABT_STACK_SIZE, 0x00000004 .set FIQ_STACK_SIZE, 0x00000004 .set IRQ_STACK_SIZE, 0X00000080 .set SVC_STACK_SIZE, 0x00000004 -// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs - .set MODE_USR, 0x10 // User Mode - .set MODE_FIQ, 0x11 // FIQ Mode - .set MODE_IRQ, 0x12 // IRQ Mode - .set MODE_SVC, 0x13 // Supervisor Mode - .set MODE_ABT, 0x17 // Abort Mode - .set MODE_UND, 0x1B // Undefined Mode - .set MODE_SYS, 0x1F // System Mode +/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */ + .set MODE_USR, 0x10 /* User Mode */ + .set MODE_FIQ, 0x11 /* FIQ Mode */ + .set MODE_IRQ, 0x12 /* IRQ Mode */ + .set MODE_SVC, 0x13 /* Supervisor Mode */ + .set MODE_ABT, 0x17 /* Abort Mode */ + .set MODE_UND, 0x1B /* Undefined Mode */ + .set MODE_SYS, 0x1F /* System Mode */ - .equ I_BIT, 0x80 // when I bit is set, IRQ is disabled - .equ F_BIT, 0x40 // when F bit is set, FIQ is disabled + .equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */ + .equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */ .section .start .set _rom_data_init, 0x108d0 .global _start -_start: - b _begin // reset - _start - ldr pc,_undf // undefined - ldr pc,_swi // SWI - ldr pc,_pabt // program abort - ldr pc,_dabt // data abort - nop // reserved - ldr pc,_irq // IRQ - ldr pc,_fiq // FIQ +_startup: + b _begin /* reset - _start */ + ldr pc,_undf /* undefined */ + ldr pc,_swi /* SWI */ + ldr pc,_pabt /* program abort */ + ldr pc,_dabt /* data abort */ + nop /* reserved */ + ldr pc,_irq /* IRQ */ + ldr pc,_fiq /* FIQ */ /* these vectors are used for rom patching */ .org 0x20 @@ -163,20 +163,20 @@ clbss_l: b main -_undf: .word __undf // undefined -_swi: .word __swi // SWI -_pabt: .word __pabt // program abort -_dabt: .word __dabt // data abort -_irq: .word irq // IRQ -_fiq: .word __fiq // FIQ +_undf: .word __undf /* undefined */ +_swi: .word __swi /* SWI */ +_pabt: .word __pabt /* program abort */ +_dabt: .word __dabt /* data abort */ +_irq: .word irq /* IRQ */ +_fiq: .word __fiq /* FIQ */ -__undf: b . // undefined -__swi: b . // SWI -__pabt: b . // program abort -__dabt: b . // data abort +__undf: b . /* undefined */ +__swi: b . /* SWI */ +__pabt: b . /* program abort */ +__dabt: b . /* data abort */ /* IRQ handler set in isr.c */ -//__irq: b . // IRQ -__fiq: b . // FIQ +/*__irq: b . // IRQ */ +__fiq: b . /* FIQ */ /* * These are defined in the board-specific linker script. From b6f21700ce76b9198f015ccd948a7534bc14ace0 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Tue, 2 Apr 2013 02:02:58 +0200 Subject: [PATCH 06/21] * clean up stuff (fix gcc warnings and added clean target for doc) --- core/kernel_init.c | 2 -- core/thread.c | 10 +++++----- doc/doxygen/Makefile | 2 ++ sys/chardev_thread.c | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/core/kernel_init.c b/core/kernel_init.c index 29122abe0a..31c216acea 100644 --- a/core/kernel_init.c +++ b/core/kernel_init.c @@ -33,8 +33,6 @@ #define ENABLE_DEBUG #include -volatile tcb_t *sched_threads[MAXTHREADS]; -volatile tcb_t *active_thread; volatile int lpm_prevent_sleep = 0; extern void main(void); diff --git a/core/thread.c b/core/thread.c index 8ba7e15bd1..c09d89a527 100644 --- a/core/thread.c +++ b/core/thread.c @@ -75,10 +75,10 @@ int thread_wakeup(int pid) { } } -int thread_measure_stack_usage(char* stack) { - unsigned int* stackp = (unsigned int*)stack; +int thread_measure_stack_usage(char *stack) { + unsigned int *stackp = (unsigned int*) (void*) stack; /* assumption that the comparison fails before or after end of stack */ - while( *stackp == (unsigned int)stackp ) + while (*stackp == (unsigned int)stackp) stackp++; int space = (unsigned int)stackp - (unsigned int)stack; @@ -109,8 +109,8 @@ int thread_create(char *stack, int stacksize, char priority, int flags, void (*f if (flags & CREATE_STACKTEST) { /* assign each int of the stack the value of it's address */ - unsigned int *stackmax = (unsigned int*) ((char*)stack + stacksize); - unsigned int* stackp = (unsigned int*)stack; + unsigned int *stackmax = (unsigned int*) (void*) (stack + stacksize); + unsigned int *stackp = (unsigned int*)(void*)stack; while(stackp < stackmax) { *stackp = (unsigned int)stackp; stackp++; diff --git a/doc/doxygen/Makefile b/doc/doxygen/Makefile index 7150229df4..2363ff6d8e 100644 --- a/doc/doxygen/Makefile +++ b/doc/doxygen/Makefile @@ -1,3 +1,5 @@ doc: doxygen riot.doxyfile +clean: + @rm -rf latex man html diff --git a/sys/chardev_thread.c b/sys/chardev_thread.c index 84fb97a3b4..098c2a047f 100644 --- a/sys/chardev_thread.c +++ b/sys/chardev_thread.c @@ -50,7 +50,7 @@ void chardev_loop(ringbuffer_t *rb) { msg_reply(&m, &m); } else { - r = (struct posix_iop_t *)m.content.ptr; + r = (struct posix_iop_t *)(void*)m.content.ptr; } break; case CLOSE: From 9556ca3e7c444c6647ce34be90b90159bebbc4d4 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Tue, 2 Apr 2013 02:04:19 +0200 Subject: [PATCH 07/21] * split up syscalls in arm and lpc specific code --- cpu/arm_common/arm_cpu.c | 13 ------ cpu/arm_common/syscalls.c | 69 +++++++++----------------------- cpu/lpc_common/hwtimer_cpu.c | 4 +- cpu/lpc_common/lpc_cpu.c | 20 ++++++++++ cpu/lpc_common/lpc_syscalls.c | 75 +++++++++++++++++++++++++++++++++++ 5 files changed, 115 insertions(+), 66 deletions(-) create mode 100644 cpu/lpc_common/lpc_cpu.c create mode 100644 cpu/lpc_common/lpc_syscalls.c diff --git a/cpu/arm_common/arm_cpu.c b/cpu/arm_common/arm_cpu.c index 97d3d13d38..d06892ab5b 100644 --- a/cpu/arm_common/arm_cpu.c +++ b/cpu/arm_common/arm_cpu.c @@ -85,16 +85,3 @@ void thread_print_stack(void) } printf("STACK (%u)= %X \n",i,*s); } - -/* LPC specific */ -#ifdef WDTC -__attribute__((naked,noreturn)) void arm_reset(void) -{ - dINT(); - WDTC = 0x00FFF; - WDMOD = 0x03; - WDFEED= 0xAA; - WDFEED= 0x55; - while(1); -} -#endif diff --git a/cpu/arm_common/syscalls.c b/cpu/arm_common/syscalls.c index 83d6d7084c..05c4108494 100644 --- a/cpu/arm_common/syscalls.c +++ b/cpu/arm_common/syscalls.c @@ -55,7 +55,6 @@ * @name Heaps (defined in linker script) * @{ */ -#define NUM_HEAPS 3//2 extern uintptr_t __heap1_start; ///< start of heap memory space extern uintptr_t __heap1_max; ///< maximum for end of heap memory space @@ -64,25 +63,6 @@ extern uintptr_t __heap2_max; ///< maximum for end of heap memory space extern uintptr_t __heap3_start; ///< start of heap memory space extern uintptr_t __heap3_max; ///< maximum for end of heap memory space - -/// current position in heap -static caddr_t heap[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start}; // add heap3 before heap2 cause Heap3 address is lower then addr of heap2 -/// maximum position in heap -static const caddr_t heap_max[NUM_HEAPS] = {(caddr_t)&__heap1_max,(caddr_t)&__heap3_max,(caddr_t)&__heap2_max}; -// start position in heap -static const caddr_t heap_start[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start}; - - -/** @} */ - -/*-----------------------------------------------------------------------------------*/ -void heap_stats(void) -{ - for(int i = 0; i < NUM_HEAPS; i++) - printf("# heap %i: %p -- %p -> %p (%li of %li free)\n", i, heap_start[i], heap[i], heap_max[i], - (uint32_t)heap_max[i] - (uint32_t)heap[i], (uint32_t)heap_max[i] - (uint32_t)heap_start[i]); -} - /*-----------------------------------------------------------------------------------*/ void __assert_func(const char *file, int line, const char *func, const char *failedexpr) { @@ -98,38 +78,7 @@ void __assert(const char *file, int line, const char *failedexpr) { __assert_func(file, line, "?", failedexpr); } -/*-----------------------------------------------------------------------------------*/ -caddr_t _sbrk_r(struct _reent *r, size_t incr) -{ - uint32_t cpsr = disableIRQ(); - /* check all heaps for a chunk of the requested size */ - for (volatile uint8_t iUsedHeap = 0; iUsedHeap < NUM_HEAPS; iUsedHeap++ ) { - caddr_t new_heap = heap[iUsedHeap] + incr; - - #ifdef MODULE_TRACELOG - trace_pointer(TRACELOG_EV_MEMORY, heap[iUsedHeap]); - #endif - if( new_heap <= heap_max[iUsedHeap] ) { - caddr_t prev_heap = heap[iUsedHeap]; - #ifdef MODULE_TRACELOG - trace_pointer(TRACELOG_EV_MEMORY, new_heap); - #endif - heap[iUsedHeap] = new_heap; - - r->_errno = 0; - restoreIRQ(cpsr); - return prev_heap; - } - } - restoreIRQ(cpsr); - #ifdef MODULE_TRACELOG - trace_string(TRACELOG_EV_MEMORY, "heap!"); // heap full - #endif - - r->_errno = ENOMEM; - return NULL; -} /*---------------------------------------------------------------------------*/ int _isatty_r(struct _reent *r, int fd) { @@ -142,6 +91,10 @@ int _isatty_r(struct _reent *r, int fd) /*---------------------------------------------------------------------------*/ _off_t _lseek_r(struct _reent *r, int fd, _off_t pos, int whence) { + /* to get rid of gcc warnings */ + (void) fd; + (void) pos; + (void) whence; _off_t result = -1; PRINTF("lseek [%i] pos %li whence %i\n", fd, pos, whence); @@ -156,6 +109,9 @@ _off_t _lseek_r(struct _reent *r, int fd, _off_t pos, int whence) /*---------------------------------------------------------------------------*/ int _open_r(struct _reent *r, const char *name, int mode) { + /* to get rid of gcc warnings */ + (void) name; + (void) mode; int ret = -1; PRINTF("open '%s' mode %#x\n", name, mode); @@ -170,6 +126,9 @@ int _open_r(struct _reent *r, const char *name, int mode) /*---------------------------------------------------------------------------*/ int _stat_r(struct _reent *r, char *name, struct stat *st) { + /* to get rid of gcc warnings */ + (void) name; + (void) st; int ret = -1; PRINTF("_stat_r '%s' \n", name); r->_errno = ENODEV; // no such device @@ -237,6 +196,10 @@ int _write_r(struct _reent *r, int fd, const void *data, unsigned int count) /*---------------------------------------------------------------------------*/ int _read_r(struct _reent *r, int fd, void *buffer, unsigned int count) { + /* to get rid of gcc warnings */ + (void) fd; + (void) buffer; + (void) count; int result = -1; r->_errno = EBADF; #ifdef MODULE_FAT @@ -250,6 +213,7 @@ int _read_r(struct _reent *r, int fd, void *buffer, unsigned int count) /*---------------------------------------------------------------------------*/ int _close_r(struct _reent *r, int fd) { + (void) fd; int result = -1; r->_errno = EBADF; #ifdef MODULE_FAT @@ -263,6 +227,9 @@ int _close_r(struct _reent *r, int fd) /*---------------------------------------------------------------------------*/ int _unlink_r(struct _reent *r, char* path) { + /* get rid of gcc warnings */ + (void) path; + int result = -1; r->_errno = ENODEV; #ifdef MODULE_FAT diff --git a/cpu/lpc_common/hwtimer_cpu.c b/cpu/lpc_common/hwtimer_cpu.c index beadde7607..2395ffc3a9 100644 --- a/cpu/lpc_common/hwtimer_cpu.c +++ b/cpu/lpc_common/hwtimer_cpu.c @@ -18,10 +18,10 @@ #define VULP(x) ((volatile unsigned long*) (x)) -/// High level interrupt handler +/* High level interrupt handler */ static void (*int_handler)(int); -/// Timer 0-3 interrupt handler +/* Timer 0-3 interrupt handler */ static void timer_irq(void) __attribute__((interrupt("IRQ"))); inline static unsigned long get_base_address(short timer) { diff --git a/cpu/lpc_common/lpc_cpu.c b/cpu/lpc_common/lpc_cpu.c new file mode 100644 index 0000000000..2aeb2e8bd3 --- /dev/null +++ b/cpu/lpc_common/lpc_cpu.c @@ -0,0 +1,20 @@ +/* + * lpc_cpu.c - LPC architecture common support functions + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT. + * + */ + +__attribute__((naked,noreturn)) void arm_reset(void) +{ + dINT(); + WDTC = 0x00FFF; + WDMOD = 0x03; + WDFEED= 0xAA; + WDFEED= 0x55; + while(1); +} diff --git a/cpu/lpc_common/lpc_syscalls.c b/cpu/lpc_common/lpc_syscalls.c new file mode 100644 index 0000000000..c7215e4d33 --- /dev/null +++ b/cpu/lpc_common/lpc_syscalls.c @@ -0,0 +1,75 @@ +/* + * syscalls.c - MCU dependent syscall implementation for LPCXXXX + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT. + * + */ + +#include + +/** + * @name Heaps (defined in linker script) + * @{ + */ +#define NUM_HEAPS 3 + +extern uintptr_t __heap1_start; ///< start of heap memory space +extern uintptr_t __heap1_max; ///< maximum for end of heap memory space +extern uintptr_t __heap2_start; ///< start of heap memory space +extern uintptr_t __heap2_max; ///< maximum for end of heap memory space +extern uintptr_t __heap3_start; ///< start of heap memory space +extern uintptr_t __heap3_max; ///< maximum for end of heap memory space + +/// current position in heap +static caddr_t heap[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start}; // add heap3 before heap2 cause Heap3 address is lower then addr of heap2 +/// maximum position in heap +static const caddr_t heap_max[NUM_HEAPS] = {(caddr_t)&__heap1_max,(caddr_t)&__heap3_max,(caddr_t)&__heap2_max}; +// start position in heap +static const caddr_t heap_start[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start}; + +/** @} */ + +/*-----------------------------------------------------------------------------------*/ +void heap_stats(void) +{ + for(int i = 0; i < NUM_HEAPS; i++) + printf("# heap %i: %p -- %p -> %p (%li of %li free)\n", i, heap_start[i], heap[i], heap_max[i], + (uint32_t)heap_max[i] - (uint32_t)heap[i], (uint32_t)heap_max[i] - (uint32_t)heap_start[i]); +} + +/*-----------------------------------------------------------------------------------*/ +caddr_t _sbrk_r(struct _reent *r, size_t incr) +{ + uint32_t cpsr = disableIRQ(); + + /* check all heaps for a chunk of the requested size */ + for (volatile uint8_t iUsedHeap = 0; iUsedHeap < NUM_HEAPS; iUsedHeap++ ) { + caddr_t new_heap = heap[iUsedHeap] + incr; + + #ifdef MODULE_TRACELOG + trace_pointer(TRACELOG_EV_MEMORY, heap[iUsedHeap]); + #endif + if( new_heap <= heap_max[iUsedHeap] ) { + caddr_t prev_heap = heap[iUsedHeap]; + #ifdef MODULE_TRACELOG + trace_pointer(TRACELOG_EV_MEMORY, new_heap); + #endif + heap[iUsedHeap] = new_heap; + + r->_errno = 0; + restoreIRQ(cpsr); + return prev_heap; + } + } + restoreIRQ(cpsr); + #ifdef MODULE_TRACELOG + trace_string(TRACELOG_EV_MEMORY, "heap!"); // heap full + #endif + + r->_errno = ENOMEM; + return NULL; +} From ce294b42493fcebeb07c9408fc8aa0c30b0188d6 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Tue, 2 Apr 2013 02:06:24 +0200 Subject: [PATCH 08/21] * changed to struct based register access for mc1322x --- cpu/mc1322x/hwtimer_cpu.c | 25 ++- cpu/mc1322x/include/cpu.h | 1 + cpu/mc1322x/include/mc1322x.h | 364 +++++++++++++++++++++++++--------- 3 files changed, 287 insertions(+), 103 deletions(-) diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c index e8da91b6c5..776aa8f342 100644 --- a/cpu/mc1322x/hwtimer_cpu.c +++ b/cpu/mc1322x/hwtimer_cpu.c @@ -21,24 +21,31 @@ #define CO_INIT 0 /* other counters cannot force a re-initialization of this counter */ #define OUT_MODE 0 /* OFLAG is asserted while counter is active */ +/* High level interrupt handler */ +static void (*int_handler)(int); + void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { + int_handler = handler; /* Reset the timer */ - TMR_ENBL = 0; + TMR0->ENBL = 0; /* Clear status */ - TMR0_SCTRL = 0; + TMR0->SCTRL = 0; /* disable interrupt */ - TMR0_CSCTRL =0x0000; + TMR0->CSCTRL =0x0000; /* Reload/initialize to zero */ - TMR0_LOAD = 0; + TMR0->LOAD = 0; /* disable comparison */ - TMR0_COMP_UP = 0; - TMR0_CMPLD1 = 0; + TMR0->COMP1 = 0; + TMR0->CMPLD1 = 0; /* set counter to zero */ - TMR0_CNTR = 0; + TMR0->CNTR = 0; - TMR0_CTRL = (COUNT_MODE<<13) | (PRIME_SRC<<9) | (SEC_SRC<<7) | (ONCE<<6) | (LEN<<5) | (DIR<<4) | (CO_INIT<<3) | (OUT_MODE); - TMR_ENBL = 0xf; /* enable all the timers --- why not? */ + /* TODO: do scaling voodoo */ + (void) fcpu; + /* TODO: use struct */ + TMR0->CTRL = (COUNT_MODE<<13) | (PRIME_SRC<<9) | (SEC_SRC<<7) | (ONCE<<6) | (LEN<<5) | (DIR<<4) | (CO_INIT<<3) | (OUT_MODE); + TMR0->ENBL = 0xf; /* enable all the timers --- why not? */ } diff --git a/cpu/mc1322x/include/cpu.h b/cpu/mc1322x/include/cpu.h index 7d9adfbcdf..609828ac23 100644 --- a/cpu/mc1322x/include/cpu.h +++ b/cpu/mc1322x/include/cpu.h @@ -10,6 +10,7 @@ #define CPU_H #include +#include "arm_cpu.h" #include "mc1322x.h" extern uintptr_t __stack_start; ///< end of user stack memory space diff --git a/cpu/mc1322x/include/mc1322x.h b/cpu/mc1322x/include/mc1322x.h index 6c91b5ec49..896396cd2f 100644 --- a/cpu/mc1322x/include/mc1322x.h +++ b/cpu/mc1322x/include/mc1322x.h @@ -11,6 +11,198 @@ #ifndef MC1322X_H #define MC1322X_H +#include + +/*-----------------------------------------------------------------*/ +/* System Management */ +#define SW_RST_VAL (0x87651234) + +#define CRM_BASE (0x80003000) + +/* Structure-based CRM access */ +struct CRM_struct { + union { + uint32_t SYS_CNTL; + struct CRM_SYS_CNTL { + uint32_t PWR_SOURCE:2; + uint32_t PADS_1P8V_SEL:1; + uint32_t :1; + uint32_t JTAG_SECU_OFF:1; + uint32_t XTAL32_EXISTS:1; + uint32_t :2; + uint32_t XTAL_CLKDIV:6; + uint32_t :18; + } SYS_CNTLbits; + }; + union { + uint32_t WU_CNTL; + struct CRM_WU_CNTL { + uint32_t TIMER_WU_EN:1; + uint32_t RTC_WU_EN:1; + uint32_t HOST_WAKE:1; + uint32_t AUTO_ADC:1; + uint32_t EXT_WU_EN:4; + uint32_t EXT_WU_EDGE:4; + uint32_t EXT_WU_POL:4; + uint32_t TIMER_WU_IEN:1; + uint32_t RTC_WU_IEN:1; + uint32_t :2; + uint32_t EXT_WU_IEN:4; + uint32_t :4; + uint32_t EXT_OUT_POL:4; + } WU_CNTLbits; + }; + union { + uint32_t SLEEP_CNTL; + struct CRM_SLEEP_CNTL { + uint32_t HIB:1; + uint32_t DOZE:1; + uint32_t :2; + uint32_t RAM_RET:2; + uint32_t MCU_RET:1; + uint32_t DIG_PAD_EN:1; + uint32_t :24; + } SLEEP_CNTLbits; + }; + union { + uint32_t BS_CNTL; + struct CRM_BS_CNTL { + uint32_t BS_EN:1; + uint32_t WAIT4IRQ:1; + uint32_t BS_MAN_EN:1; + uint32_t :2; + uint32_t ARM_OFF_TIME:6; + uint32_t :18; + } BS_CNTLbits; + }; + union { + uint32_t COP_CNTL; + struct CRM_COP_CNTL { + uint32_t COP_EN:1; + uint32_t COP_OUT:1; + uint32_t COP_WP:1; + uint32_t :5; + uint32_t COP_TIMEOUT:7; + uint32_t :1; + uint32_t COP_COUNT:7; + uint32_t :9; + } COP_CNTLbits; + }; + uint32_t COP_SERVICE; + union { + uint32_t STATUS; + struct CRM_STATUS { + uint32_t SLEEP_SYNC:1; + uint32_t HIB_WU_EVT:1; + uint32_t DOZE_WU_EVT:1; + uint32_t RTC_WU_EVT:1; + uint32_t EXT_WU_EVT:4; + uint32_t :1; + uint32_t CAL_DONE:1; + uint32_t COP_EVT:1; + uint32_t :6; + uint32_t VREG_BUCK_RDY:1; + uint32_t VREG_1P8V_RDY:1; + uint32_t VREG_1P5V_RDY:1; + uint32_t :12; + } STATUSbits; + }; + union { + uint32_t MOD_STATUS; + struct CRM_MOD_STATUS { + uint32_t ARM_EN:1; + uint32_t MACA_EN:1; + uint32_t ASM_EN:1; + uint32_t SPI_EN:1; + uint32_t GPIO_EN:1; + uint32_t UART1_EN:1; + uint32_t UART2_EN:1; + uint32_t TMR_EN:1; + uint32_t RIF_EN:1; + uint32_t I2C_EN:1; + uint32_t SSI_EN:1; + uint32_t SPIF_EN:1; + uint32_t ADC_EN:1; + uint32_t :1; + uint32_t JTA_EN:1; + uint32_t NEX_EN:1; + uint32_t :1; + uint32_t AIM_EN:1; + uint32_t :14; + } MOD_STATUSbits; + }; + uint32_t WU_COUNT; + uint32_t WU_TIMEOUT; + uint32_t RTC_COUNT; + uint32_t RTC_TIMEOUT; + uint32_t reserved1; + union { + uint32_t CAL_CNTL; + struct CRM_CAL_CNTL { + uint32_t CAL_TIMEOUT:16; + uint32_t CAL_EN:1; + uint32_t CAL_IEN:1; + uint32_t :14; + } CAL_CNTLbits; + }; + uint32_t CAL_COUNT; + union { + uint32_t RINGOSC_CNTL; + struct CRM_RINGOSC_CNTL { + uint32_t ROSC_EN:1; + uint32_t :3; + uint32_t ROSC_FTUNE:5; + uint32_t ROSC_CTUNE:4; + uint32_t :19; + } RINGOSC_CNTLbits; + }; + union { + uint32_t XTAL_CNTL; + struct CRM_XTAL_CNTL { + uint32_t :8; + uint32_t XTAL_IBIAS_SEL:4; + uint32_t :4; + uint32_t XTAL_FTUNE:5; + uint32_t XTAL_CTUNE:5; + uint32_t :6; + } XTAL_CNTLbits; + }; + union { + uint32_t XTAL32_CNTL; + struct CRM_XTAL32_CNTL { + uint32_t XTAL32_EN:1; + uint32_t :3; + uint32_t XTAL32_GAIN:2; + uint32_t :26; + } XTAL32_CNTLbits; + }; + union { + uint32_t VREG_CNTL; + struct CRM_VREG_CNTL { + uint32_t BUCK_EN:1; + uint32_t BUCK_SYNC_REC_EN:1; + uint32_t BUCK_BYPASS_EN:1; + uint32_t VREG_1P5V_EN:2; + uint32_t VREG_1P5V_SEL:2; + uint32_t VREG_1P8V_EN:1; + uint32_t BUCK_CLKDIV:4; + uint32_t :20; + } VREG_CNTLbits; + }; + uint32_t reserved2; + uint32_t SW_RST; + uint32_t reserved3; + uint32_t reserved4; + uint32_t reserved5; + uint32_t reserved6; +}; + +static volatile struct CRM_struct * const CRM = (void*) (CRM_BASE); + + +/*-----------------------------------------------------------------*/ +/* TIMERS */ + #define F_CPU (24000000) ///< CPU target speed in Hz /* Timer registers are all 16-bit wide with 16-bit access only */ @@ -21,16 +213,6 @@ #define TMR2_BASE (TMR_BASE + TMR_OFFSET*2) #define TMR3_BASE (TMR_BASE + TMR_OFFSET*3) -/* Structure-based register definitions */ -/* Example use: - TMR2->CTRL = 0x1234; - TMR2->CTRLbits = (struct TMR_CTRL) { - .DIR = 1, - .OUTPUT_MODE = 2, - }; - TMR2->CTRLbits.PRIMARY_CNT_SOURCE = 3; -*/ - struct TMR_struct { uint16_t COMP1; uint16_t COMP2; @@ -120,91 +302,85 @@ static volatile struct TMR_struct * const TMR3 = (void *) (TMR3_BASE); /* Get timer number from the timer pointer. */ #define TMR_NUM(x) (((uint32_t)(x) - TMR_BASE) / TMR_OFFSET) -/* Used to compute which enable bit to set for a particular timer, e.g. - TMR0.ENBL |= TMR_ENABLE_BIT(TMR2); - Helpful when you're using macros to define timers -*/ -#define TMR_ENABLE_BIT(x) (1 << TMR_NUM(x)) +/*-----------------------------------------------------------------*/ +/* UART */ +#define UART1_BASE (0x80005000) +#define UART2_BASE (0x8000B000) -#define TMR0_PIN GPIO_08 -#define TMR1_PIN GPIO_09 -#define TMR2_PIN GPIO_10 -#define TMR3_PIN GPIO_11 +struct UART_struct { + union { + uint32_t CON; + struct UART_CON { + uint32_t :16; + uint32_t TST:1; + uint32_t MRXR:1; + uint32_t MTXR:1; + uint32_t FCE:1; + uint32_t FCP:1; + uint32_t XTIM:1; + uint32_t :2; + uint32_t TXOENB:1; + uint32_t CONTX:1; + uint32_t SB:1; + uint32_t ST2:1; + uint32_t EP:1; + uint32_t PEN:1; + uint32_t RXE:1; + uint32_t TXE:1; + } CONbits; + }; + union { + uint32_t STAT; + struct UART_STAT { + uint32_t :24; + uint32_t TXRDY:1; + uint32_t RXRDY:1; + uint32_t RUE:1; + uint32_t ROE:1; + uint32_t TOE:1; + uint32_t FE:1; + uint32_t PE:1; + uint32_t SE:1; + } USTATbits; + }; + union { + uint32_t DATA; + struct UART_DATA { + uint32_t :24; + uint32_t DATA:8; + } DATAbits; + }; + union { + uint32_t RXCON; + struct UART_URXCON { + uint32_t :26; + uint32_t LVL:6; + } RXCONbits; + }; + union { + uint32_t TXCON; + struct UART_TXCON { + uint32_t :26; + uint32_t LVL:6; + } TXCONbits; + }; + union { + uint32_t CTS; + struct UART_CTS { + uint32_t :27; + uint32_t LVL:5; + } CTSbits; + }; + union { + uint32_t BR; + struct UART_BR { + uint32_t INC:16; + uint32_t MOD:16; + } BRbits; + }; +}; -#define TMR_REGOFF_COMP1 (0x0) -#define TMR_REGOFF_COMP2 (0x2) -#define TMR_REGOFF_CAPT (0x4) -#define TMR_REGOFF_LOAD (0x6) -#define TMR_REGOFF_HOLD (0x8) -#define TMR_REGOFF_CNTR (0xa) -#define TMR_REGOFF_CTRL (0xc) -#define TMR_REGOFF_SCTRL (0xe) -#define TMR_REGOFF_CMPLD1 (0x10) -#define TMR_REGOFF_CMPLD2 (0x12) -#define TMR_REGOFF_CSCTRL (0x14) -#define TMR_REGOFF_ENBL (0x1e) +static volatile struct UART_struct * const UART1 = (void *) (UART1_BASE); +static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE); -/* one enable register to rule them all */ -#define TMR_ENBL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_ENBL)) - -/* Timer 0 registers */ -#define TMR0_COMP1 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_COMP1)) -#define TMR0_COMP_UP TMR0_COMP1 -#define TMR0_COMP2 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_COMP2)) -#define TMR0_COMP_DOWN TMR0_COMP2 -#define TMR0_CAPT (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CAPT)) -#define TMR0_LOAD (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_LOAD)) -#define TMR0_HOLD (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_HOLD)) -#define TMR0_CNTR (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CNTR)) -#define TMR0_CTRL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CTRL)) -#define TMR0_SCTRL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_SCTRL)) -#define TMR0_CMPLD1 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CMPLD1)) -#define TMR0_CMPLD2 (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CMPLD2)) -#define TMR0_CSCTRL (*(volatile uint16_t *) (TMR0_BASE + TMR_REGOFF_CSCTRL)) - -/* Timer 1 registers */ -#define TMR1_COMP1 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_COMP1)) -#define TMR1_COMP_UP TMR1_COMP1 -#define TMR1_COMP2 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_COMP2)) -#define TMR1_COMP_DOWN TMR1_COMP2 -#define TMR1_CAPT (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CAPT)) -#define TMR1_LOAD (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_LOAD)) -#define TMR1_HOLD (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_HOLD)) -#define TMR1_CNTR (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CNTR)) -#define TMR1_CTRL (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CTRL)) -#define TMR1_SCTRL (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_SCTRL)) -#define TMR1_CMPLD1 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CMPLD1)) -#define TMR1_CMPLD2 (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CMPLD2)) -#define TMR1_CSCTRL (*(volatile uint16_t *) (TMR1_BASE + TMR_REGOFF_CSCTRL)) - -/* Timer 2 registers */ -#define TMR2_COMP1 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_COMP1)) -#define TMR2_COMP_UP TMR2_COMP1 -#define TMR2_COMP2 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_COMP2)) -#define TMR2_COMP_DOWN TMR2_COMP2 -#define TMR2_CAPT (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CAPT)) -#define TMR2_LOAD (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_LOAD)) -#define TMR2_HOLD (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_HOLD)) -#define TMR2_CNTR (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CNTR)) -#define TMR2_CTRL (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CTRL)) -#define TMR2_SCTRL (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_SCTRL)) -#define TMR2_CMPLD1 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CMPLD1)) -#define TMR2_CMPLD2 (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CMPLD2)) -#define TMR2_CSCTRL (*(volatile uint16_t *) (TMR2_BASE + TMR_REGOFF_CSCTRL)) - -/* Timer 3 registers */ -#define TMR3_COMP1 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_COMP1)) -#define TMR3_COMP_UP TMR3_COMP1 -#define TMR3_COMP2 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_COMP2)) -#define TMR3_COMP_DOWN TMR3_COMP2 -#define TMR3_CAPT (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CAPT)) -#define TMR3_LOAD (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_LOAD)) -#define TMR3_HOLD (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_HOLD)) -#define TMR3_CNTR (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CNTR)) -#define TMR3_CTRL (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CTRL)) -#define TMR3_SCTRL (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_SCTRL)) -#define TMR3_CMPLD1 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CMPLD1)) -#define TMR3_CMPLD2 (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CMPLD2)) -#define TMR3_CSCTRL (*(volatile uint16_t *) (TMR3_BASE + TMR_REGOFF_CSCTRL)) -#define TMR(num, reg) CAT2(TMR,num,_##reg) #endif /* MC1322X_H */ From 24300304f33af1b259bfa6a73717fa878c305339 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Tue, 2 Apr 2013 02:07:13 +0200 Subject: [PATCH 09/21] * added startup code for mc1322x --- cpu/mc1322x/mc1322x.lds | 1 + cpu/mc1322x/startup.s | 69 ++++++++++++++++++----------------------- 2 files changed, 32 insertions(+), 38 deletions(-) diff --git a/cpu/mc1322x/mc1322x.lds b/cpu/mc1322x/mc1322x.lds index fac0152494..5f6fdd9f9e 100644 --- a/cpu/mc1322x/mc1322x.lds +++ b/cpu/mc1322x/mc1322x.lds @@ -1,3 +1,4 @@ +/* vim: set syntax=rpcgen : */ /* Script for -z combreloc: combine and sort reloc sections */ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") diff --git a/cpu/mc1322x/startup.s b/cpu/mc1322x/startup.s index 96440f5eca..84e5519c18 100644 --- a/cpu/mc1322x/startup.s +++ b/cpu/mc1322x/startup.s @@ -58,38 +58,36 @@ IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -/* Stack Sizes */ - .set UND_STACK_SIZE, 0x00000004 - .set ABT_STACK_SIZE, 0x00000004 - .set FIQ_STACK_SIZE, 0x00000004 - .set IRQ_STACK_SIZE, 0X00000080 - .set SVC_STACK_SIZE, 0x00000004 +/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */ +.set MODE_USR, 0x10 /* Normal User Mode */ +.set MODE_FIQ, 0x11 /* FIQ Processing Fast Interrupts Mode */ +.set MODE_IRQ, 0x12 /* IRQ Processing Standard Interrupts Mode */ +.set MODE_SVC, 0x13 /* Supervisor Processing Software Interrupts Mode */ +.set MODE_ABT, 0x17 /* Abort Processing memory Faults Mode */ +.set MODE_UND, 0x1B /* Undefined Processing Undefined Instructions Mode */ +.set MODE_SYS, 0x1F /* System Running Priviledged Operating System Tasks Mode */ -/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */ - .set MODE_USR, 0x10 /* User Mode */ - .set MODE_FIQ, 0x11 /* FIQ Mode */ - .set MODE_IRQ, 0x12 /* IRQ Mode */ - .set MODE_SVC, 0x13 /* Supervisor Mode */ - .set MODE_ABT, 0x17 /* Abort Mode */ - .set MODE_UND, 0x1B /* Undefined Mode */ - .set MODE_SYS, 0x1F /* System Mode */ +.set I_BIT, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */ +.set F_BIT, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */ - .equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */ - .equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */ - .section .start + .section .startup .set _rom_data_init, 0x108d0 - .global _start + .global _startup + .func _startup + _startup: b _begin /* reset - _start */ - ldr pc,_undf /* undefined */ - ldr pc,_swi /* SWI */ - ldr pc,_pabt /* program abort */ - ldr pc,_dabt /* data abort */ - nop /* reserved */ - ldr pc,_irq /* IRQ */ - ldr pc,_fiq /* FIQ */ + ldr PC, Undef_Addr /* Undefined Instruction */ + ldr PC, SWI_Addr /* Software Interrupt */ + ldr PC, PAbt_Addr /* Prefetch Abort */ + ldr PC, DAbt_Addr /* Data Abort */ + nop /* Reserved Vector (holds Philips ISP checksum) */ + /* see page 71 of "Insiders Guide to the Philips ARM7-Based Microcontrollers" by Trevor Martin */ + /* ldr PC, [PC,#-0x0120] /* Interrupt Request Interrupt (load from VIC) */ + ldr PC, IRQ_Addr /* Interrupt Request Interrupt (load from VIC) */ + ldr r0, =__fiq_handler /* Fast Interrupt Request Interrupt */ /* these vectors are used for rom patching */ .org 0x20 @@ -163,19 +161,14 @@ clbss_l: b main -_undf: .word __undf /* undefined */ -_swi: .word __swi /* SWI */ -_pabt: .word __pabt /* program abort */ -_dabt: .word __dabt /* data abort */ -_irq: .word irq /* IRQ */ -_fiq: .word __fiq /* FIQ */ - -__undf: b . /* undefined */ -__swi: b . /* SWI */ -__pabt: b . /* program abort */ -__dabt: b . /* data abort */ -/* IRQ handler set in isr.c */ -/*__irq: b . // IRQ */ +/* Exception vector handlers branching table */ +Undef_Addr: .word UNDEF_Routine /* defined in main.c */ +SWI_Addr: .word ctx_switch /* defined in main.c */ +PAbt_Addr: .word PABT_Routine /* defined in main.c */ +DAbt_Addr: .word DABT_Routine /* defined in main.c */ +IRQ_Addr: .word arm_irq_handler /* defined in main.c */ +__fiq_handler: .word __fiq /* FIQ */ + __fiq: b . /* FIQ */ /* From 0add4cad211a23aaedd1276b58b897070934dcd3 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Tue, 2 Apr 2013 02:07:41 +0200 Subject: [PATCH 10/21] * mc1322x specifics syscalls --- cpu/mc1322x/cpu.c | 19 ++++++++++++ cpu/mc1322x/mc1322x_syscalls.c | 56 ++++++++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+) create mode 100644 cpu/mc1322x/cpu.c create mode 100644 cpu/mc1322x/mc1322x_syscalls.c diff --git a/cpu/mc1322x/cpu.c b/cpu/mc1322x/cpu.c new file mode 100644 index 0000000000..89c640b0dc --- /dev/null +++ b/cpu/mc1322x/cpu.c @@ -0,0 +1,19 @@ +/* + * cpu.c - MC1322X architecture common support functions + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT. + * + */ + +#include "mc1322x.h" + +__attribute__((naked,noreturn)) void arm_reset(void) +{ + dINT(); + CRM->SW_RST = SW_RST_VAL; + while(1); +} diff --git a/cpu/mc1322x/mc1322x_syscalls.c b/cpu/mc1322x/mc1322x_syscalls.c new file mode 100644 index 0000000000..4844e7fccc --- /dev/null +++ b/cpu/mc1322x/mc1322x_syscalls.c @@ -0,0 +1,56 @@ +/* + * mc1322x_syscalls.c - MCU dependent syscall implementation + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT. + */ + +#include +#include +#include +#include +#include "irq.h" + +extern uintptr_t __heap_start; ///< start of heap memory space +extern uintptr_t __heap_end; ///< maximum for end of heap memory space + +/// current position in heap +static caddr_t heap = (caddr_t)&__heap_start; +/// maximum position in heap +static const caddr_t heap_max = (caddr_t)&__heap_end; +// start position in heap +static const caddr_t heap_start = (caddr_t)&__heap_start; + +/*-----------------------------------------------------------------------------------*/ +caddr_t _sbrk_r(struct _reent *r, size_t incr) +{ + uint32_t cpsr = disableIRQ(); + + /* check all heaps for a chunk of the requested size */ + caddr_t new_heap = heap + incr; + + #ifdef MODULE_TRACELOG + trace_pointer(TRACELOG_EV_MEMORY, heap); + #endif + if( new_heap <= heap_max ) { + caddr_t prev_heap = heap; +#ifdef MODULE_TRACELOG + trace_pointer(TRACELOG_EV_MEMORY, new_heap); +#endif + heap = new_heap; + + r->_errno = 0; + restoreIRQ(cpsr); + return prev_heap; + } + restoreIRQ(cpsr); + #ifdef MODULE_TRACELOG + trace_string(TRACELOG_EV_MEMORY, "heap!"); // heap full + #endif + + r->_errno = ENOMEM; + return NULL; +} From c39fd9d8dcb0f87518c1c94c5906ccdd9226fe1a Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Tue, 9 Apr 2013 23:30:52 +0200 Subject: [PATCH 11/21] * minor changes --- Makefile.include | 2 +- cpu/lpc2387/linkerscript.x | 22 ++++------------------ 2 files changed, 5 insertions(+), 19 deletions(-) diff --git a/Makefile.include b/Makefile.include index 0ba16357ea..f94651409e 100644 --- a/Makefile.include +++ b/Makefile.include @@ -46,7 +46,7 @@ clean: rm -f $(PROJBINDIR)/* flash: all - $(FLASHER) $(PORT) $(PROJBINDIR)/$(PROJECT).hex + $(FLASHER) $(FFLAGS) term: $(TERM) $(PORT) diff --git a/cpu/lpc2387/linkerscript.x b/cpu/lpc2387/linkerscript.x index 79ca56a93b..ae779f2044 100644 --- a/cpu/lpc2387/linkerscript.x +++ b/cpu/lpc2387/linkerscript.x @@ -1,28 +1,14 @@ /****************************************************************************** -Copyright 2008-2009, Freie Universitaet Berlin (FUB). All rights reserved. +Copyright 2013, Freie Universitaet Berlin (FUB). All rights reserved. These sources were developed at the Freie Universitaet Berlin, Computer Systems and Telematics group (http://cst.mi.fu-berlin.de). ------------------------------------------------------------------------------- This file is part of RIOT. -This program is free software: you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free Software -Foundation, either version 3 of the License, or (at your option) any later -version. - -RIOT is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS -FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along with -this program. If not, see http://www.gnu.org/licenses/ . --------------------------------------------------------------------------------- -For further information and questions please use the web site - http://scatterweb.mi.fu-berlin.de -and the mailinglist (subscription via web site) - scatterweb@lists.spline.inf.fu-berlin.de -*******************************************************************************/ + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + */ /* specify the LPC2387 memory areas (see LPC2387 datasheet page 15) */ MEMORY From 64cbb25d3e6a16d71e01ca4e826c19153bad8cd8 Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Thu, 25 Apr 2013 13:30:09 +0200 Subject: [PATCH 12/21] * changed httimer_arch_init() to init all 4 timers and added implementation for hwtimer_arch_set --- cpu/mc1322x/hwtimer_cpu.c | 95 ++++++++++++++++++++++++++++++--------- cpu/mc1322x/startup.s | 13 +++--- 2 files changed, 81 insertions(+), 27 deletions(-) diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c index 776aa8f342..2b662c5514 100644 --- a/cpu/mc1322x/hwtimer_cpu.c +++ b/cpu/mc1322x/hwtimer_cpu.c @@ -1,6 +1,7 @@ /* * hwtimer_cpu.c - architecture dependent hardware timer functionality * Copyright (C) 2013 Oliver Hahm + * Copyright (C) 2013 Thomas Eichinger * * This source code is licensed under the GNU General Public License, * Version 3. See the file LICENSE for more details. @@ -10,42 +11,94 @@ #include #include "mc1322x.h" +#include "hwtimer_arch.h" +#include "irq.h" -/* TODO: do scaling voodoo */ -#define COUNT_MODE 1 /* use rising edge of primary source */ -#define PRIME_SRC 0xf /* Perip. clock with 128 prescale (for 24Mhz = 187500Hz)*/ -#define SEC_SRC 0 /* don't need this */ -#define ONCE 0 /* keep counting */ -#define LEN 0 /* continue counting */ -#define DIR 0 /* count up */ -#define CO_INIT 0 /* other counters cannot force a re-initialization of this counter */ -#define OUT_MODE 0 /* OFLAG is asserted while counter is active */ +#define VULP(x) ((volatile unsigned long*) (x)) /* High level interrupt handler */ static void (*int_handler)(int); -void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { - int_handler = handler; +void timer_x_init(TMR_struct* TMRx) { /* Reset the timer */ - TMR0->ENBL = 0; + TMRx->ENBL = 0; /* Clear status */ - TMR0->SCTRL = 0; + TMRx->SCTRL = 0; /* disable interrupt */ - TMR0->CSCTRL =0x0000; + TMRx->CSCTRL =0x0000; /* Reload/initialize to zero */ - TMR0->LOAD = 0; + TMRx->LOAD = 0; /* disable comparison */ - TMR0->COMP1 = 0; - TMR0->CMPLD1 = 0; + TMRx->COMP1 = 0; + TMRx->CMPLD1 = 0; /* set counter to zero */ - TMR0->CNTR = 0; + TMRx->CNTR = 0; + + /* set timer control bits */ + TMRx->CTRLbits.COUNT_MODE = 1; /* use rising edge of primary source */ + TMRx->CTRLbits.PRIMARY_CNT_SOURCE = 0x0f; /* Perip. clock with 128 prescale (for 24MHz = 187500Hz) */ + TMRx->CTRLbits.SECONDARY_CNT_SOURCE = 0x00; /* don't need this */ + TMRx->CTRLbits.ONCE = 0x00; /* keep counting */ + TMRx->CTRLbits.LENGTH = 0x00; /* continue counting */ + TMRx->CTRLbits.DIR = 0x00; /* count up */ + TMRx->CTRLbits.CO_INIT = 0x00; /* other counters cannot force a reinitialization of this counter*/ + TMRx->CTRLbits.OUTPUT_MODE = 0x00; /* OFLAG is asserted while counter is active */ + + TMRx->ENBL = 0xf; /* enable all the timers --- why not? */ +}; +void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { + int_handler = handler; + /* TODO: do scaling voodoo */ (void) fcpu; - /* TODO: use struct */ - TMR0->CTRL = (COUNT_MODE<<13) | (PRIME_SRC<<9) | (SEC_SRC<<7) | (ONCE<<6) | (LEN<<5) | (DIR<<4) | (CO_INIT<<3) | (OUT_MODE); - TMR0->ENBL = 0xf; /* enable all the timers --- why not? */ + + timer_x_init(TMR0); + timer_x_init(TMR1); + timer_x_init(TMR2); + timer_x_init(TMR3); +}; +/*---------------------------------------------------------------------------*/ +void hwtimer_arch_enable_interrupt(void) { + +} + +/*---------------------------------------------------------------------------*/ +void hwtimer_arch_disable_interrupt(void) { + +} + +/*---------------------------------------------------------------------------*/ +void hwtimer_arch_set(unsigned long offset, short timer) { + /* get corresponding struct for the given ::timer parameter */ + TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); + + /* disable IRQs and save the status register */ + unsigned long cpsr = disableIRQ(); + + tmr->COMP1 = tmr->CNTR + offset; /* load the current value + offset into the compare register */ + tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ + tmr->CSCTRLbits.TCF1EN = 1; /* enable intterupts when TCF1 is set \ */ + tmr->SCTRLbits.TCFIE = 1; /* enable interrupts when TCF is one - do we need both?*/ + + /* restor status register */ + restoreIRQ(cpsr); +} + +/*---------------------------------------------------------------------------*/ +void hwtimer_arch_set_absolute(unsigned long value, short timer) { + +} + +/*---------------------------------------------------------------------------*/ +void hwtimer_arch_unset(short timer) { + +} + +/*---------------------------------------------------------------------------*/ +unsigned long hwtimer_arch_now(void) { + } diff --git a/cpu/mc1322x/startup.s b/cpu/mc1322x/startup.s index 84e5519c18..30edd9a37c 100644 --- a/cpu/mc1322x/startup.s +++ b/cpu/mc1322x/startup.s @@ -83,11 +83,12 @@ _startup: ldr PC, SWI_Addr /* Software Interrupt */ ldr PC, PAbt_Addr /* Prefetch Abort */ ldr PC, DAbt_Addr /* Data Abort */ - nop /* Reserved Vector (holds Philips ISP checksum) */ + nop /* Reserved Vector (holds Philips ISP checksum) */ + /* see page 71 of "Insiders Guide to the Philips ARM7-Based Microcontrollers" by Trevor Martin */ - /* ldr PC, [PC,#-0x0120] /* Interrupt Request Interrupt (load from VIC) */ + /* ldr PC, [PC,#-0x0120] /* Interrupt Request Interrupt (load from VIC) */ ldr PC, IRQ_Addr /* Interrupt Request Interrupt (load from VIC) */ - ldr r0, =__fiq_handler /* Fast Interrupt Request Interrupt */ + ldr r0, =__fiq_handler /* Fast Interrupt Request Interrupt */ /* these vectors are used for rom patching */ .org 0x20 @@ -163,11 +164,11 @@ clbss_l: /* Exception vector handlers branching table */ Undef_Addr: .word UNDEF_Routine /* defined in main.c */ -SWI_Addr: .word ctx_switch /* defined in main.c */ +SWI_Addr: .word ctx_switch /* defined in main.c */ PAbt_Addr: .word PABT_Routine /* defined in main.c */ DAbt_Addr: .word DABT_Routine /* defined in main.c */ -IRQ_Addr: .word arm_irq_handler /* defined in main.c */ -__fiq_handler: .word __fiq /* FIQ */ +IRQ_Addr: .word arm_irq_handler /* defined in main.c */ +__fiq_handler: .word __fiq /* FIQ */ __fiq: b . /* FIQ */ From abc80ba5e48ddbb425d8f0a52e566bcd8b45eb9c Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Thu, 25 Apr 2013 13:32:50 +0200 Subject: [PATCH 13/21] added implementation of htimer_arch_set_absolute() --- cpu/mc1322x/hwtimer_cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c index 2b662c5514..cfb1aedd81 100644 --- a/cpu/mc1322x/hwtimer_cpu.c +++ b/cpu/mc1322x/hwtimer_cpu.c @@ -90,7 +90,19 @@ void hwtimer_arch_set(unsigned long offset, short timer) { /*---------------------------------------------------------------------------*/ void hwtimer_arch_set_absolute(unsigned long value, short timer) { + /* get corresponding struct for the given ::timer parameter */ + TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); + /* disable IRQs and save the status register */ + unsigned long cpsr = disableIRQ(); + + tmr->COMP1 = value; /* load the value into the compare register */ + tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ + tmr->CSCTRLbits.TCF1EN = 1; /* enable intterupts when TCF1 is set \ */ + tmr->SCTRLbits.TCFIE = 1; /* enable interrupts when TCF is one - do we need both?*/ + + /* restor status register */ + restoreIRQ(cpsr); } /*---------------------------------------------------------------------------*/ From cc49d42f99f54ff168ca148a355e1ed2c36ed7e0 Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Thu, 25 Apr 2013 13:38:55 +0200 Subject: [PATCH 14/21] added implementations for hwtimer_arch_unset() and hwtimer_arch_now() --- cpu/mc1322x/hwtimer_cpu.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c index cfb1aedd81..eca4237eee 100644 --- a/cpu/mc1322x/hwtimer_cpu.c +++ b/cpu/mc1322x/hwtimer_cpu.c @@ -14,8 +14,6 @@ #include "hwtimer_arch.h" #include "irq.h" -#define VULP(x) ((volatile unsigned long*) (x)) - /* High level interrupt handler */ static void (*int_handler)(int); @@ -98,7 +96,7 @@ void hwtimer_arch_set_absolute(unsigned long value, short timer) { tmr->COMP1 = value; /* load the value into the compare register */ tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ - tmr->CSCTRLbits.TCF1EN = 1; /* enable intterupts when TCF1 is set \ */ + tmr->CSCTRLbits.TCF1EN = 1; /* enable interrupts when TCF1 is set \ */ tmr->SCTRLbits.TCFIE = 1; /* enable interrupts when TCF is one - do we need both?*/ /* restor status register */ @@ -107,10 +105,15 @@ void hwtimer_arch_set_absolute(unsigned long value, short timer) { /*---------------------------------------------------------------------------*/ void hwtimer_arch_unset(short timer) { + /* get corresponding struct for the given ::timer parameter */ + TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); + tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ + tmr->CSCTRLbits.TCF1EN = 0; /* disable interrupts for TCF1 */ + tmr->SCTRLbits.TCFIE = 0; /* disable interrupts for TCF */ } /*---------------------------------------------------------------------------*/ unsigned long hwtimer_arch_now(void) { - + return TMR0->CNTR; } From ee6d1e160418a1d09a4cdd1b1c4372e3cb210cae Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Thu, 25 Apr 2013 14:56:32 +0200 Subject: [PATCH 15/21] implemented hwtimer_arch_(enable|disable)_interrupt() and added ITC definitions --- cpu/mc1322x/hwtimer_cpu.c | 10 ++- cpu/mc1322x/include/mc1322x.h | 136 ++++++++++++++++++++++++++++++++++ 2 files changed, 144 insertions(+), 2 deletions(-) diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c index eca4237eee..8580c63a19 100644 --- a/cpu/mc1322x/hwtimer_cpu.c +++ b/cpu/mc1322x/hwtimer_cpu.c @@ -45,6 +45,8 @@ void timer_x_init(TMR_struct* TMRx) { TMRx->CTRLbits.OUTPUT_MODE = 0x00; /* OFLAG is asserted while counter is active */ TMRx->ENBL = 0xf; /* enable all the timers --- why not? */ + + /* TODO: install ISR */ }; void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { @@ -61,12 +63,16 @@ void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { /*---------------------------------------------------------------------------*/ void hwtimer_arch_enable_interrupt(void) { - + /* this enables timer interrupts in general by using the ITC. + * Timer specific interrupt control is given by the TMRx structs. */ + enable_irq(TRM); } /*---------------------------------------------------------------------------*/ void hwtimer_arch_disable_interrupt(void) { - + /* this disables timer interrupts in general by using the ITC. + * Timer specific interrupt control is given by the TMRx structs. */ + disable_irq(TRM); } /*---------------------------------------------------------------------------*/ diff --git a/cpu/mc1322x/include/mc1322x.h b/cpu/mc1322x/include/mc1322x.h index 896396cd2f..0a389a8f7b 100644 --- a/cpu/mc1322x/include/mc1322x.h +++ b/cpu/mc1322x/include/mc1322x.h @@ -383,4 +383,140 @@ struct UART_struct { static volatile struct UART_struct * const UART1 = (void *) (UART1_BASE); static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE); +/*-----------------------------------------------------------------*/ +/* Interrupts */ +#define INTBASE (0x80020000) + +#include + +/* Structure-based ITC access */ +#define __INTERRUPT_union(x) \ + union { \ + uint32_t x; \ + struct ITC_##x { \ + uint32_t ASM:1; \ + uint32_t UART1:1; \ + uint32_t UART2:1; \ + uint32_t CRM:1; \ + uint32_t I2C:1; \ + uint32_t TMR:1; \ + uint32_t SPIF:1; \ + uint32_t MACA:1; \ + uint32_t SSI:1; \ + uint32_t ADC:1; \ + uint32_t SPI:1; \ + uint32_t :21; \ + } x##bits; \ + }; + +struct ITC_struct { + union { + uint32_t INTCNTL; + struct ITC_INTCNTL { + uint32_t :19; + uint32_t FIAD:1; + uint32_t NIAD:1; + uint32_t :11; + } INTCNTLbits; + }; + uint32_t NIMASK; + uint32_t INTENNUM; + uint32_t INTDISNUM; + __INTERRUPT_union(INTENABLE); + __INTERRUPT_union(INTTYPE); + uint32_t reserved[4]; + uint32_t NIVECTOR; + uint32_t FIVECTOR; + __INTERRUPT_union(INTSRC); + __INTERRUPT_union(INTFRC); + __INTERRUPT_union(NIPEND); + __INTERRUPT_union(FIPEND); +}; +#undef __INTERRUPT_union + +static volatile struct ITC_struct * const ITC = (void *) (INTBASE); + +/* Old register definitions, for compatibility */ +#ifndef REG_NO_COMPAT + +#define INTCNTL_OFF (0x0) +#define INTENNUM_OFF (0x8) +#define INTDISNUM_OFF (0xC) +#define INTENABLE_OFF (0x10) +#define INTSRC_OFF (0x30) +#define INTFRC_OFF (0x34) +#define NIPEND_OFF (0x38) + +static volatile uint32_t * const INTCNTL = ((volatile uint32_t *) (INTBASE + INTCNTL_OFF)); +static volatile uint32_t * const INTENNUM = ((volatile uint32_t *) (INTBASE + INTENNUM_OFF)); +static volatile uint32_t * const INTDISNUM = ((volatile uint32_t *) (INTBASE + INTDISNUM_OFF)); +static volatile uint32_t * const INTENABLE = ((volatile uint32_t *) (INTBASE + INTENABLE_OFF)); +static volatile uint32_t * const INTSRC = ((volatile uint32_t *) (INTBASE + INTSRC_OFF)); +static volatile uint32_t * const INTFRC = ((volatile uint32_t *) (INTBASE + INTFRC_OFF)); +static volatile uint32_t * const NIPEND = ((volatile uint32_t *) (INTBASE + NIPEND_OFF)); + +enum interrupt_nums { + INT_NUM_ASM = 0, + INT_NUM_UART1, + INT_NUM_UART2, + INT_NUM_CRM, + INT_NUM_I2C, + INT_NUM_TMR, + INT_NUM_SPIF, + INT_NUM_MACA, + INT_NUM_SSI, + INT_NUM_ADC, + INT_NUM_SPI, +}; + +#define global_irq_disable() (set_bit(*INTCNTL,20)) +#define global_irq_enable() (clear_bit(*INTCNTL,20)) + +#define enable_irq(irq) (*INTENNUM = INT_NUM_##irq) +#define disable_irq(irq) (*INTDISNUM = INT_NUM_##irq) + +#define safe_irq_disable(x) volatile uint32_t saved_irq; saved_irq = *INTENABLE; disable_irq(x) +#define irq_restore() *INTENABLE = saved_irq + +#endif /* REG_NO_COMPAT */ + +/* Macro to safely disable all interrupts for a block of code. + Use it like this: + disable_int({ + asdf = 1234; + printf("hi\r\n"); + }); +*/ +#define __int_top() volatile uint32_t saved_intenable +#define __int_disable() saved_intenable = ITC->INTENABLE; ITC->INTENABLE = 0 +#define __int_enable() ITC->INTENABLE = saved_intenable +#define disable_int(x) do { \ + __int_top(); \ + __int_disable(); \ + x; \ + __int_enable(); } while(0) + + +extern void tmr0_isr(void) __attribute__((weak)); +extern void tmr1_isr(void) __attribute__((weak)); +extern void tmr2_isr(void) __attribute__((weak)); +extern void tmr3_isr(void) __attribute__((weak)); + +extern void rtc_isr(void) __attribute__((weak)); +extern void kbi4_isr(void) __attribute__((weak)); +extern void kbi5_isr(void) __attribute__((weak)); +extern void kbi6_isr(void) __attribute__((weak)); +extern void kbi7_isr(void) __attribute__((weak)); + +extern void cal_isr(void) __attribute__((weak)); + +extern void uart1_isr(void) __attribute__((weak)); +extern void uart2_isr(void) __attribute__((weak)); + +extern void maca_isr(void) __attribute__((weak)); + +extern void asm_isr(void) __attribute__((weak)); + +extern void i2c_isr(void) __attribute__((weak)); + #endif /* MC1322X_H */ From 92adb3e401dbb6ad02f39c67c9c6496eef9af9c6 Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Tue, 23 Jul 2013 10:36:16 +0200 Subject: [PATCH 16/21] * added proper "struct TMR_struct*" in hwtimer_cpu.c * removed dublicate definition of the UART structure in mc1322x.h --- cpu/mc1322x/hwtimer_cpu.c | 18 ++++---- cpu/mc1322x/include/mc1322x.h | 85 +---------------------------------- 2 files changed, 12 insertions(+), 91 deletions(-) diff --git a/cpu/mc1322x/hwtimer_cpu.c b/cpu/mc1322x/hwtimer_cpu.c index 8580c63a19..cc431b89e1 100644 --- a/cpu/mc1322x/hwtimer_cpu.c +++ b/cpu/mc1322x/hwtimer_cpu.c @@ -17,7 +17,7 @@ /* High level interrupt handler */ static void (*int_handler)(int); -void timer_x_init(TMR_struct* TMRx) { +void timer_x_init(volatile struct TMR_struct* const TMRx) { /* Reset the timer */ TMRx->ENBL = 0; /* Clear status */ @@ -47,7 +47,7 @@ void timer_x_init(TMR_struct* TMRx) { TMRx->ENBL = 0xf; /* enable all the timers --- why not? */ /* TODO: install ISR */ -}; +} void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { int_handler = handler; @@ -59,26 +59,28 @@ void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { timer_x_init(TMR1); timer_x_init(TMR2); timer_x_init(TMR3); -}; +} /*---------------------------------------------------------------------------*/ void hwtimer_arch_enable_interrupt(void) { /* this enables timer interrupts in general by using the ITC. * Timer specific interrupt control is given by the TMRx structs. */ - enable_irq(TRM); + //enable_irq(INT_NUM_TMR); + ITC->INTENABLEbits.TMR = 1; } /*---------------------------------------------------------------------------*/ void hwtimer_arch_disable_interrupt(void) { /* this disables timer interrupts in general by using the ITC. * Timer specific interrupt control is given by the TMRx structs. */ - disable_irq(TRM); + //disable_irq(INT_NUM_TMR); + ITC->INTENABLEbits.TMR = 1; } /*---------------------------------------------------------------------------*/ void hwtimer_arch_set(unsigned long offset, short timer) { /* get corresponding struct for the given ::timer parameter */ - TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); + struct TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); /* disable IRQs and save the status register */ unsigned long cpsr = disableIRQ(); @@ -95,7 +97,7 @@ void hwtimer_arch_set(unsigned long offset, short timer) { /*---------------------------------------------------------------------------*/ void hwtimer_arch_set_absolute(unsigned long value, short timer) { /* get corresponding struct for the given ::timer parameter */ - TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); + struct TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); /* disable IRQs and save the status register */ unsigned long cpsr = disableIRQ(); @@ -112,7 +114,7 @@ void hwtimer_arch_set_absolute(unsigned long value, short timer) { /*---------------------------------------------------------------------------*/ void hwtimer_arch_unset(short timer) { /* get corresponding struct for the given ::timer parameter */ - TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); + struct TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET); tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */ tmr->CSCTRLbits.TCF1EN = 0; /* disable interrupts for TCF1 */ diff --git a/cpu/mc1322x/include/mc1322x.h b/cpu/mc1322x/include/mc1322x.h index 0a389a8f7b..c2c5f8bd4d 100644 --- a/cpu/mc1322x/include/mc1322x.h +++ b/cpu/mc1322x/include/mc1322x.h @@ -302,87 +302,6 @@ static volatile struct TMR_struct * const TMR3 = (void *) (TMR3_BASE); /* Get timer number from the timer pointer. */ #define TMR_NUM(x) (((uint32_t)(x) - TMR_BASE) / TMR_OFFSET) -/*-----------------------------------------------------------------*/ -/* UART */ -#define UART1_BASE (0x80005000) -#define UART2_BASE (0x8000B000) - -struct UART_struct { - union { - uint32_t CON; - struct UART_CON { - uint32_t :16; - uint32_t TST:1; - uint32_t MRXR:1; - uint32_t MTXR:1; - uint32_t FCE:1; - uint32_t FCP:1; - uint32_t XTIM:1; - uint32_t :2; - uint32_t TXOENB:1; - uint32_t CONTX:1; - uint32_t SB:1; - uint32_t ST2:1; - uint32_t EP:1; - uint32_t PEN:1; - uint32_t RXE:1; - uint32_t TXE:1; - } CONbits; - }; - union { - uint32_t STAT; - struct UART_STAT { - uint32_t :24; - uint32_t TXRDY:1; - uint32_t RXRDY:1; - uint32_t RUE:1; - uint32_t ROE:1; - uint32_t TOE:1; - uint32_t FE:1; - uint32_t PE:1; - uint32_t SE:1; - } USTATbits; - }; - union { - uint32_t DATA; - struct UART_DATA { - uint32_t :24; - uint32_t DATA:8; - } DATAbits; - }; - union { - uint32_t RXCON; - struct UART_URXCON { - uint32_t :26; - uint32_t LVL:6; - } RXCONbits; - }; - union { - uint32_t TXCON; - struct UART_TXCON { - uint32_t :26; - uint32_t LVL:6; - } TXCONbits; - }; - union { - uint32_t CTS; - struct UART_CTS { - uint32_t :27; - uint32_t LVL:5; - } CTSbits; - }; - union { - uint32_t BR; - struct UART_BR { - uint32_t INC:16; - uint32_t MOD:16; - } BRbits; - }; -}; - -static volatile struct UART_struct * const UART1 = (void *) (UART1_BASE); -static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE); - /*-----------------------------------------------------------------*/ /* Interrupts */ #define INTBASE (0x80020000) @@ -472,8 +391,8 @@ enum interrupt_nums { #define global_irq_disable() (set_bit(*INTCNTL,20)) #define global_irq_enable() (clear_bit(*INTCNTL,20)) -#define enable_irq(irq) (*INTENNUM = INT_NUM_##irq) -#define disable_irq(irq) (*INTDISNUM = INT_NUM_##irq) +#define enable_irq(irq) (*INTENNUM = irq) +#define disable_irq(irq) (*INTDISNUM = irq) #define safe_irq_disable(x) volatile uint32_t saved_irq; saved_irq = *INTENABLE; disable_irq(x) #define irq_restore() *INTENABLE = saved_irq From 585f4f3698894fe7af4d62a39432c45efbeb9d31 Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Tue, 23 Jul 2013 15:27:12 +0200 Subject: [PATCH 17/21] embedded mc1322x radio API into transceiver.{c,h} --- sys/include/transceiver.h | 8 ++++-- sys/transceiver/Makefile | 2 +- sys/transceiver/transceiver.c | 53 +++++++++++++++++++++++++++++++++++ 3 files changed, 59 insertions(+), 4 deletions(-) diff --git a/sys/include/transceiver.h b/sys/include/transceiver.h index 9d2732baf0..a38d09c82d 100644 --- a/sys/include/transceiver.h +++ b/sys/include/transceiver.h @@ -26,6 +26,7 @@ enum transceiver_msg_type_t { /* Message types for driver <-> transceiver communication */ RCV_PKT_CC1020, ///< packet was received by CC1020 transceiver RCV_PKT_CC1100, ///< packet was received by CC1100 transceiver + RCV_PKT_MC1322X, ///< packet was received by mc1322x transceiver /* Message types for transceiver <-> upper layer communication */ PKT_PENDING, ///< packet pending in transceiver buffer @@ -50,9 +51,10 @@ enum transceiver_msg_type_t { * @brief All supported transceivers */ typedef enum { - TRANSCEIVER_NONE, ///< Invalid - TRANSCEIVER_CC1100, ///< CC110X transceivers - TRANSCEIVER_CC1020 ///< CC1020 transceivers + TRANSCEIVER_NONE = 0, ///< Invalid + TRANSCEIVER_CC1100 = 1, ///< CC110X transceivers + TRANSCEIVER_CC1020 = 2, ///< CC1020 transceivers + TRANSCEIVER_MC1322X = 4 ///< cm1322x transceiver } transceiver_type_t; /** diff --git a/sys/transceiver/Makefile b/sys/transceiver/Makefile index 3d01f44b6d..3ea248c4a1 100644 --- a/sys/transceiver/Makefile +++ b/sys/transceiver/Makefile @@ -1,4 +1,4 @@ -INCLUDES = -I../include -I$(RIOTBAE)/drivers/include -I$(RIOTBASE)/drivers/cc110x_ng/include -I../lib -I$(RIOTCPU)/$(CPU)/include -I../net -I../../core/include +INCLUDES = -I../include -I$(RIOTBAE)/drivers/include -I$(RIOTBASE)/drivers/cc110x_ng/include -I../lib -I$(RIOTCPU)/$(CPU)/include -I../net -I../../core/include -I$(RIOTBOARD)/redbee-econotag/drivers/include MODULE =transceiver include $(MAKEBASE)/Makefile.base diff --git a/sys/transceiver/transceiver.c b/sys/transceiver/transceiver.c index aff05018da..654d54dcc2 100644 --- a/sys/transceiver/transceiver.c +++ b/sys/transceiver/transceiver.c @@ -25,6 +25,12 @@ #endif #endif +//#ifdef MODULE_MC1322X +#include +#include +#include +//#endif + //#define ENABLE_DEBUG (1) #include @@ -99,6 +105,9 @@ void transceiver_init(transceiver_type_t t) { if (t & TRANSCEIVER_CC1100) { transceivers |= t; } + else if (t & TRANSCEIVER_MC1322X) { + transceivers |= t; + } else { puts("Invalid transceiver type"); } @@ -119,6 +128,9 @@ int transceiver_start(void) { cc1100_set_packet_monitor(cc1100_packet_monitor); #endif } + else if (transceivers & TRANSCEIVER_MC1322X) { + maca_init(); + } return transceiver_pid; } @@ -162,6 +174,7 @@ void run(void) { switch (m.type) { case RCV_PKT_CC1020: case RCV_PKT_CC1100: + case RCV_PKT_MC1322X: receive_packet(m.type, m.content.value); break; case SND_PKT: @@ -238,6 +251,9 @@ static void receive_packet(uint16_t type, uint8_t pos) { case RCV_PKT_CC1100: t = TRANSCEIVER_CC1100; break; + case RCV_PKT_MC1322X: + t = TRANSCEIVER_MC1322X; + break; default: t = TRANSCEIVER_NONE; break; @@ -266,6 +282,8 @@ static void receive_packet(uint16_t type, uint8_t pos) { #else receive_cc1100_packet(trans_p); #endif + } else if (type == RCV_PKT_MC1322X) { + receive_mc1322x_packet(trans_p); } else { puts("Invalid transceiver type"); @@ -328,6 +346,21 @@ void receive_cc1100_packet(radio_packet_t *trans_p) { } #endif +//#ifdef MODULE_MC1322X +void receive_mc1322x_packet(radio_packet_t *trans_p) { + maca_packet_t* maca_pkt; + dINT(); + maca_pkt = maca_get_rx_packet (); + trans_p->lqi = maca_pkt->lqi; + trans_p->length = maca_pkt->length; + memcpy((void*) &(data_buffer[transceiver_buffer_pos * PAYLOAD_SIZE]), maca_pkt->data, MACA_MAX_PAYLOAD_SIZE); + maca_free_packet( maca_pkt ); + eINT(); + + trans_p->data = (uint8_t*) &(data_buffer[transceiver_buffer_pos * MACA_MAX_PAYLOAD_SIZE]); +} +//#endif + /*------------------------------------------------------------------------------------*/ /* @@ -348,6 +381,9 @@ static uint8_t send_packet(transceiver_type_t t, void *pkt) { #ifdef MODULE_CC110X_NG cc110x_packet_t cc110x_pkt; #endif +//#ifdef MODULE_MC1322X + maca_packet_t* maca_pkt = maca_get_free_packet(); +//#endif switch (t) { case TRANSCEIVER_CC1100: @@ -368,6 +404,11 @@ static uint8_t send_packet(transceiver_type_t t, void *pkt) { } #endif break; + case TRANSCEIVER_MC1322X: + maca_pkt->length = p.length; + memcpy(maca_pkt->data, p.data, p.length); + maca_set_tx_packet( maca_pkt ); + res = 1; default: puts("Unknown transceiver"); break; @@ -393,6 +434,9 @@ static int16_t set_channel(transceiver_type_t t, void *channel) { #else return cc1100_set_channel(c); #endif + case TRANSCEIVER_MC1322X: + maca_set_channel(c); + return c; ///< TODO: should be changed! implement get channel default: return -1; } @@ -413,6 +457,8 @@ static int16_t get_channel(transceiver_type_t t) { #else return cc1100_get_channel(); #endif + case TRANSCEIVER_MC1322X: + ///< TODO:implement return maca_get_channel(); default: return -1; } @@ -433,6 +479,8 @@ static int16_t get_address(transceiver_type_t t) { #else return cc1100_get_address(); #endif + case TRANSCEIVER_MC1322X: + return maca_get_address(); default: return -1; } @@ -455,6 +503,8 @@ static int16_t set_address(transceiver_type_t t, void *address) { #else return cc1100_set_address(addr); #endif + case TRANSCEIVER_MC1322X: + return maca_set_address(addr); default: return -1; } @@ -485,6 +535,9 @@ static void powerdown(transceiver_type_t t) { cc110x_switch_to_pwd(); #endif break; + case TRANSCEIVER_MC1322X: + maca_off(); + break; default: break; } From 4bc89bd45889e843a6105a0810d15cbeb89093cd Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Wed, 24 Jul 2013 15:50:16 +0200 Subject: [PATCH 18/21] added fixes for compilation for mc1322x --- cpu/Makefile.include | 1 + cpu/mc1322x/mc1322x.lds | 10 ++++++---- drivers/cc110x_ng/cc110x-rx.c | 2 +- drivers/cc110x_ng/cc110x-tx.c | 2 +- sys/net/sixlowpan/sixlowpan.c | 2 +- 5 files changed, 10 insertions(+), 7 deletions(-) diff --git a/cpu/Makefile.include b/cpu/Makefile.include index 968ca3812b..11c6ba081e 100644 --- a/cpu/Makefile.include +++ b/cpu/Makefile.include @@ -14,6 +14,7 @@ endif ifeq ($(CPU),mc1322x) export USEMODULE += arm_common export UNDEF += $(BINDIR)syscalls.o + export UNDEF += $(BINDIR)mc1322x_syscalls.o export INCLUDES += -I$(RIOTBASE)/cpu/arm_common/include endif ifeq ($(CPU),native) diff --git a/cpu/mc1322x/mc1322x.lds b/cpu/mc1322x/mc1322x.lds index 5f6fdd9f9e..e3f5258ca3 100644 --- a/cpu/mc1322x/mc1322x.lds +++ b/cpu/mc1322x/mc1322x.lds @@ -160,7 +160,8 @@ HEAP_SIZE = 4096; .got : { *(.got.plt) *(.got) } .data : { - __data_start = . ; + /* changed from __data_start = . ; */ + _data = . ; *(.data .data.* .gnu.linkonce.d.*) SORT(CONSTRUCTORS) } @@ -212,15 +213,16 @@ HEAP_SIZE = 4096; pad the .data section. */ . = ALIGN(. != 0 ? 32 / 8 : 1); } - _bss_end__ = . ; __bss_end__ = . ; + /* changed from _bss_end__ = . ; __bss_end__ = . ; */ + __bss_end = . ; __bss_end__ = . ; . = ALIGN(32 / 8); .heap : { - __heap_start__ = . ; PROVIDE(__HEAP_START = .); + __heap_start__ = . ; PROVIDE(__heap_start = .); *(.heap); . += HEAP_SIZE; . = ALIGN (4); - __heap_end__ = . ; PROVIDE(__HEAP_END = .); + __heap_end__ = . ; PROVIDE(__heap_end = .); } diff --git a/drivers/cc110x_ng/cc110x-rx.c b/drivers/cc110x_ng/cc110x-rx.c index 95ce073873..585ebb3a42 100644 --- a/drivers/cc110x_ng/cc110x-rx.c +++ b/drivers/cc110x_ng/cc110x-rx.c @@ -10,7 +10,7 @@ #include #include -#include +//#include #ifdef DBG_IGNORE #include diff --git a/drivers/cc110x_ng/cc110x-tx.c b/drivers/cc110x_ng/cc110x-tx.c index bffb8339da..e217526d5b 100644 --- a/drivers/cc110x_ng/cc110x-tx.c +++ b/drivers/cc110x_ng/cc110x-tx.c @@ -9,7 +9,7 @@ #include -#include +//#include uint8_t cc110x_send(cc110x_packet_t *packet) { volatile uint32_t abort_count; diff --git a/sys/net/sixlowpan/sixlowpan.c b/sys/net/sixlowpan/sixlowpan.c index 028cc85408..c7919cb49e 100644 --- a/sys/net/sixlowpan/sixlowpan.c +++ b/sys/net/sixlowpan/sixlowpan.c @@ -9,7 +9,7 @@ #include #include #include -#include +//#include #include "msg.h" #include "sixlowmac.h" #include "sixlowpan.h" From 42001d8ddb03410477eb40820de17fe377e174c2 Mon Sep 17 00:00:00 2001 From: Oleg Hahm Date: Wed, 24 Jul 2013 22:22:08 +0200 Subject: [PATCH 19/21] dummy lpm_set implementation --- cpu/mc1322x/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/cpu/mc1322x/cpu.c b/cpu/mc1322x/cpu.c index 89c640b0dc..c5b7cde2fc 100644 --- a/cpu/mc1322x/cpu.c +++ b/cpu/mc1322x/cpu.c @@ -10,6 +10,7 @@ */ #include "mc1322x.h" +#include "lpm.h" __attribute__((naked,noreturn)) void arm_reset(void) { @@ -17,3 +18,7 @@ __attribute__((naked,noreturn)) void arm_reset(void) CRM->SW_RST = SW_RST_VAL; while(1); } + +enum lpm_mode lpm_set(enum lpm_mode target) { + return LPM_ON; +} From e9cee715a19ab41971e63b28e53bac886609870c Mon Sep 17 00:00:00 2001 From: Oleg Hahm Date: Wed, 24 Jul 2013 22:22:34 +0200 Subject: [PATCH 20/21] Use basic CFLAGS for ARM bootloader code --- cpu/arm_common/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/cpu/arm_common/Makefile b/cpu/arm_common/Makefile index 23949ac078..765464e60b 100644 --- a/cpu/arm_common/Makefile +++ b/cpu/arm_common/Makefile @@ -1,5 +1,6 @@ MODULE =arm_common INCLUDES = -Iinclude -I../$(CPU)/include -I../../sys/lib -I../../drivers/include -I../../core/include -I../../sys/include -I../../hal/include -I../../.. -I../../sys/lib/fat +CFLAGS = $(CFLAGS_BASIC) include $(RIOTBASE)/Makefile.base From cce8f46e497cc499839ec22e48d9ab50f818db62 Mon Sep 17 00:00:00 2001 From: Oleg Hahm Date: Wed, 24 Jul 2013 22:23:21 +0200 Subject: [PATCH 21/21] experimental sixlowpan fixes to eliminate multiple definitions --- sys/net/sixlowpan/sixlowborder.h | 2 +- sys/net/sixlowpan/sixlowip.c | 2 -- sys/net/sixlowpan/sixlowmac.c | 5 ----- sys/net/sixlowpan/sixlowmac.h | 1 - sys/net/sixlowpan/sixlownd.c | 4 ---- sys/net/sixlowpan/sixlowpan.c | 7 +------ 6 files changed, 2 insertions(+), 19 deletions(-) diff --git a/sys/net/sixlowpan/sixlowborder.h b/sys/net/sixlowpan/sixlowborder.h index ada8333119..f2e790c7b7 100644 --- a/sys/net/sixlowpan/sixlowborder.h +++ b/sys/net/sixlowpan/sixlowborder.h @@ -12,7 +12,7 @@ extern ipv6_addr_t abr_addr; -uint16_t border_get_serial_reader(); +uint16_t border_get_serial_reader(void); uint8_t *get_serial_out_buffer(int offset); uint8_t *get_serial_in_buffer(int offset); diff --git a/sys/net/sixlowpan/sixlowip.c b/sys/net/sixlowpan/sixlowip.c index a0dd1e0d41..05470a7600 100644 --- a/sys/net/sixlowpan/sixlowip.c +++ b/sys/net/sixlowpan/sixlowip.c @@ -18,9 +18,7 @@ uint8_t buffer[BUFFER_SIZE]; msg_t msg_queue[IP_PKT_RECV_BUF_SIZE]; struct ipv6_hdr_t* ipv6_buf; struct icmpv6_hdr_t* icmp_buf; -uint8_t ipv6_ext_hdr_len; uint8_t *nextheader; -iface_t iface; uint8_t iface_addr_list_count = 0; int udp_packet_handler_pid = 0; int tcp_packet_handler_pid = 0; diff --git a/sys/net/sixlowpan/sixlowmac.c b/sys/net/sixlowpan/sixlowmac.c index e000f08695..da6206e043 100644 --- a/sys/net/sixlowpan/sixlowmac.c +++ b/sys/net/sixlowpan/sixlowmac.c @@ -18,15 +18,10 @@ char radio_stack_buffer[RADIO_STACK_SIZE]; msg_t msg_q[RADIO_RCV_BUF_SIZE]; -uint8_t snd_buffer[RADIO_SND_BUF_SIZE][PAYLOAD_SIZE]; static uint8_t r_src_addr; uint8_t buf[PAYLOAD_SIZE]; -uint16_t packet_length; static uint8_t macdsn; -//static uint8_t macbsn; - -mutex_t buf_mutex; static radio_packet_t p; static msg_t mesg; diff --git a/sys/net/sixlowpan/sixlowmac.h b/sys/net/sixlowpan/sixlowmac.h index f9b63e0d53..4cd4148455 100644 --- a/sys/net/sixlowpan/sixlowmac.h +++ b/sys/net/sixlowpan/sixlowmac.h @@ -11,7 +11,6 @@ #define RADIO_STACK_SIZE 512 #define RADIO_RCV_BUF_SIZE 64 -#define RADIO_SND_BUF_SIZE 100 #define RADIO_SENDING_DELAY 1000 extern uint16_t fragmentcounter; diff --git a/sys/net/sixlowpan/sixlownd.c b/sys/net/sixlowpan/sixlownd.c index ed5be56b00..dbafcf75be 100644 --- a/sys/net/sixlowpan/sixlownd.c +++ b/sys/net/sixlowpan/sixlownd.c @@ -17,7 +17,6 @@ /* extern variables */ uint8_t opt_hdr_len = 0; uint8_t ipv6_ext_hdr_len = 0; -uint16_t packet_length; /* counter */ uint8_t abr_count = 0; @@ -26,9 +25,6 @@ uint8_t def_rtr_count = 0; uint8_t rtr_sol_count = 0; uint8_t prefix_count = 0; -/* global interface*/ -iface_t iface; - /* datastructures */ abr_cache_t abr_cache[ABR_CACHE_SIZE]; nbr_cache_t nbr_cache[NBR_CACHE_SIZE]; diff --git a/sys/net/sixlowpan/sixlowpan.c b/sys/net/sixlowpan/sixlowpan.c index c7919cb49e..a655481283 100644 --- a/sys/net/sixlowpan/sixlowpan.c +++ b/sys/net/sixlowpan/sixlowpan.c @@ -8,8 +8,6 @@ #include #include #include -#include -//#include #include "msg.h" #include "sixlowmac.h" #include "sixlowpan.h" @@ -30,7 +28,7 @@ uint8_t max_frag_initial = 0; uint8_t position; uint8_t max_frag; -struct ipv6_hdr_t *ipv6_buf; +static struct ipv6_hdr_t *ipv6_buf; /* length of compressed packet */ uint16_t comp_len; @@ -1397,9 +1395,6 @@ void sixlowpan_init(transceiver_type_t trans, uint8_t r_addr, int as_border){ /* init mac-layer and radio transceiver */ sixlowmac_init(trans); - rtc_init(); - rtc_enable(); - /* init interface addresses */ memset(&iface,0,sizeof(iface_t)); set_radio_address(r_addr);