cpu/fe310: Use ecall instruction for thread yield
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f1367818ca
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@ -108,6 +108,19 @@ void handle_trap(uint32_t mcause)
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}
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}
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}
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}
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else {
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else {
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switch (mcause) {
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case CAUSE_USER_ECALL: /* ECALL from user mode */
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case CAUSE_MACHINE_ECALL: /* ECALL from machine mode */
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{
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/* TODO: get the ecall arguments */
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sched_context_switch_request = 1;
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/* Increment the return program counter past the ecall
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* instruction */
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uint32_t return_pc = read_csr(mepc);
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write_csr(mepc, return_pc + 4);
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break;
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}
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default:
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#ifdef DEVELHELP
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#ifdef DEVELHELP
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printf("Unhandled trap:\n");
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printf("Unhandled trap:\n");
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printf(" mcause: 0x%"PRIx32"\n", mcause);
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printf(" mcause: 0x%"PRIx32"\n", mcause);
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@ -117,6 +130,7 @@ void handle_trap(uint32_t mcause)
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/* Unknown trap */
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/* Unknown trap */
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core_panic(PANIC_GENERAL_ERROR, "Unhandled trap");
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core_panic(PANIC_GENERAL_ERROR, "Unhandled trap");
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}
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}
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}
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/* ISR done - no more changes to thread states */
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/* ISR done - no more changes to thread states */
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fe310_in_isr = 0;
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fe310_in_isr = 0;
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}
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}
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@ -178,13 +178,22 @@ void cpu_switch_context_exit(void)
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UNREACHABLE();
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UNREACHABLE();
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}
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}
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static inline void _ecall_dispatch(uint32_t num, void *ctx)
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{
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/* function arguments are in a0 and a1 as per ABI */
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__asm__ volatile (
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"mv a0, %[num] \n"
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"mv a1, %[ctx] \n"
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"ECALL\n"
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: /* No outputs */
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: [num] "r" (num), [ctx] "r" (ctx)
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: "memory"
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);
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}
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void thread_yield_higher(void)
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void thread_yield_higher(void)
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{
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{
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/* Use SW intr to schedule context switch */
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_ecall_dispatch(0, NULL);
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CLINT_REG(CLINT_MSIP) = 1;
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/* Latency of SW intr can be 4-7 cycles; wait for the SW intr */
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__asm__ volatile ("wfi");
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}
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}
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/**
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/**
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