diff --git a/boards/slwstk6220a/Makefile b/boards/slwstk6220a/Makefile new file mode 100644 index 0000000000..37891de8e6 --- /dev/null +++ b/boards/slwstk6220a/Makefile @@ -0,0 +1,4 @@ +# tell the Makefile.base which module to build +MODULE = $(BOARD)_base + +include $(RIOTBASE)/Makefile.base diff --git a/boards/slwstk6220a/Makefile.dep b/boards/slwstk6220a/Makefile.dep new file mode 100644 index 0000000000..e69de29bb2 diff --git a/boards/slwstk6220a/Makefile.features b/boards/slwstk6220a/Makefile.features new file mode 100644 index 0000000000..95601352c6 --- /dev/null +++ b/boards/slwstk6220a/Makefile.features @@ -0,0 +1,8 @@ +FEATURES_PROVIDED += cpp + +FEATURES_PROVIDED += periph_cpuid +FEATURES_PROVIDED += periph_gpio +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart + +FEATURES_MCU_GROUP = cortex_m4 diff --git a/boards/slwstk6220a/Makefile.include b/boards/slwstk6220a/Makefile.include new file mode 100644 index 0000000000..e20b096b01 --- /dev/null +++ b/boards/slwstk6220a/Makefile.include @@ -0,0 +1,20 @@ +# define the cpu used by WSTK6220 +export CPU = ezr32wg +export CPU_MODEL = ezr32wg330f256r60 + +# set default port depending on operating system +PORT_LINUX ?= /dev/ttyACM0 +PORT_DARWIN ?= $(shell ls -1 /dev/tty.usbmodem* | head -n 1) + +# setup the boards dependencies +include $(RIOTBOARD)/$(BOARD)/Makefile.dep + +# setup JLink for flashing +export JLINK_DEVICE := ezr32wg330f256 +include $(RIOTBOARD)/Makefile.include.jlink + +# setup serial terminal +include $(RIOTBOARD)/Makefile.include.serial + +# include cortex defaults +include $(RIOTBOARD)/Makefile.include.cortexm_common diff --git a/boards/slwstk6220a/board.c b/boards/slwstk6220a/board.c new file mode 100644 index 0000000000..4baec01e0e --- /dev/null +++ b/boards/slwstk6220a/board.c @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2015 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_wstk6220 + * @{ + * + * @file + * @brief Board specific implementations WSTK6220 board + * + * @author Hauke Petersen + * + * @} + */ + +#include "board.h" +#include "cpu.h" +#include "periph/gpio.h" + +void board_init(void) +{ + /* enable access to the evaluation board controller chip. Without this, the + * board controller does not forward the UART output to the USB port */ + gpio_init(BC_PIN, GPIO_DIR_OUT, GPIO_NOPULL); + gpio_set(BC_PIN); + /* initialize the boards LEDs */ + gpio_init(LED0_PIN, GPIO_DIR_OUT, GPIO_NOPULL); + gpio_init(LED1_PIN, GPIO_DIR_OUT, GPIO_NOPULL); + /* initialize the CPU */ + cpu_init(); +} diff --git a/boards/slwstk6220a/include/board.h b/boards/slwstk6220a/include/board.h new file mode 100644 index 0000000000..66862120f2 --- /dev/null +++ b/boards/slwstk6220a/include/board.h @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2015 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @defgroup boards_wstk6220 Silicon Labs WSTK6220 Eval Kit + * @ingroup boards + * @brief Support for the Silicon Labs WSTK6220 evaluation kit + * @{ + * + * @file + * @brief Board specific definitions for the WSTK6220 evaluation kit + * + * @author Hauke Petersen + */ + +#ifndef BOARD_H +#define BOARD_H + +#include "cpu.h" +#include "periph_conf.h" +#include "periph_cpu.h" +#include "periph/gpio.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Define the nominal CPU core clock in this board + */ +#define F_CPU (CLOCK_CORECLOCK) + +/** + * @brief Assign the hardware timer + */ +#define HW_TIMER TIMER_DEV(0) + +/** + * @brief Define UART device and baudrate for STDIO + * @{ + */ +#define STDIO UART_DEV(0) +#define STDIO_BAUDRATE (115200U) +#define STDIO_RX_BUFSIZE (64U) +/** @} */ + +/** + * @brief Connection to the on-board temperature/humidity sensor (Si7021) + * @{ + */ +#define SI7021_I2C (I2C_0) +#define SI7021_ADDR (0) /* TODO */ +#define SI7021_EN_PIN GPIO_PIN(PF,8) +/** @} */ + +/** + * @brief GPIO pin for enabling communication through the board controller + */ +#define BC_PIN GPIO_PIN(PA,12) + +/** + * @brief User button pin definitions + * @{ + */ +#define PB0_PIN GPIO_PIN(PE,3) +#define PB1_PIN GPIO_PIN(PE,2) +/** @} */ + +/** + * @brief LED pin definitions + * @{ + */ +#define LED0_PIN GPIO_PIN(PF,6) +#define LED1_PIN GPIO_PIN(PF,7) +/** @} */ + +/** + * @brief Macros for controlling the on-board LEDs. + * @{ + */ +#define LED0_ON gpio_set(LED0_PIN) +#define LED0_OFF gpio_clear(LED0_PIN) +#define LED0_TOGGLE gpio_toggle(LED0_PIN) +#define LED1_ON gpio_set(LED1_PIN) +#define LED1_OFF gpio_clear(LED1_PIN) +#define LED1_TOGGLE gpio_toggle(LED1_PIN) + +/* for compatability to other boards */ +#define LED_GREEN_ON LED1_ON +#define LED_GREEN_OFF LED1_OFF +#define LED_GREEN_TOGGLE LED1_TOGGLE +#define LED_ORANGE_ON /* not available */ +#define LED_ORANGE_OFF /* not available */ +#define LED_ORANGE_TOGGLE /* not available */ +#define LED_RED_ON LED0_ON +#define LED_RED_OFF LED0_OFF +#define LED_RED_TOGGLE LED0_TOGGLE +/** @} */ + +/** + * @brief Initialize board specific hardware, including clock, LEDs and std-IO + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/slwstk6220a/include/periph_conf.h b/boards/slwstk6220a/include/periph_conf.h new file mode 100644 index 0000000000..cd808722c3 --- /dev/null +++ b/boards/slwstk6220a/include/periph_conf.h @@ -0,0 +1,93 @@ +/* + * Copyright (C) 2015 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_wstk6220 + * @{ + * + * @file + * @brief Configuration of CPU peripherals for the WSTK6220 board + * + * @author Hauke Petersen + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include +#include "cpu.h" +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Clock configuration + * @{ + */ +#define CLOCK_RCOSC (14000000) /* internal RC oscillator speed */ +/* external oscillator speed, comment out if you want to use the internal RC + * oscillator circuit as a clock source */ +#define CLOCK_HFXO (48000000U) +/* define clock dividers */ +#define CLOCK_HFCORECLKDIV (1U) /* core clock divider */ +#define CLOCK_HFPERCLKDIV (1U) /* peripheral clock divider */ + +/* generate the actual clock values */ +#ifdef CLOCK_HFXO +#define CLOCK_CORECLOCK (CLOCK_HFXO / CLOCK_HFCORECLKDIV) +#else +#define CLOCK_CORECLOCK (CLOCK_RCOSC / CLOCK_HFCORECLKDIV) +#endif +#define CLOCK_HFPERCLK (CLOCK_CORECLOCK / CLOCK_HFPERCLKDIV) +/** @} */ + +/** + * @brief Timer configuration + * @{ + */ +static const timer_conf_t timer_config[] = { + { + TIMER0, /* lower numbered timer, used as pre-scaler */ + TIMER1, /* higher numbered timer, this is the one */ + 5, /* pre-scaler bit in the CMU register */ + TIMER1_IRQn, /* IRQn of the higher numbered driver */ + } +}; + +#define TIMER_0_ISR isr_timer1 +#define TIMER_0_MAX_VALUE (0xffff) /* 16-bit timer */ +#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0])) +/** @} */ + +/** + * @brief UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + USART2, /* device */ + GPIO_PIN(PB,4), /* RX pin */ + GPIO_PIN(PB,3), /* TX pin */ + 1, /* AF location */ + 2, /* bit in CMU enable register */ + USART2_RX_IRQn /* IRQ base channel */ + }, +}; + +#define UART_0_ISR_RX isr_usart2_rx +#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */