cpu/stm32: use UID_BASE from CMSIS when not defined
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@ -1,37 +0,0 @@
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/*
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* Copyright (C) 2019 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief STM32WB CPU specific definitions for internal peripheral handling
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*
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* @author Francisco Molina <francois-xavier.molina@inria.fr>
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*
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*/
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#ifndef PERIPH_WB_PERIPH_CPU_H
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#define PERIPH_WB_PERIPH_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Starting address of the CPU ID
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*/
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#define CPUID_ADDR (0x1fff7580)
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_WB_PERIPH_CPU_H */
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/** @} */
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@ -41,10 +41,6 @@
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#include "periph/l1/periph_cpu.h"
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#include "periph/l1/periph_cpu.h"
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#elif defined(CPU_FAM_STM32L4)
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#elif defined(CPU_FAM_STM32L4)
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#include "periph/l4/periph_cpu.h"
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#include "periph/l4/periph_cpu.h"
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#elif defined(CPU_FAM_STM32WB)
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#include "periph/wb/periph_cpu.h"
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#else
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#error Unsupported STM32 CPU family
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#endif
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#endif
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -74,6 +70,13 @@ extern "C" {
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*/
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*/
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#define CPUID_LEN (12U)
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#define CPUID_LEN (12U)
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/**
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* @brief Starting address of the CPU ID
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*/
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#ifndef CPUID_ADDR
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#define CPUID_ADDR (UID_BASE)
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#endif
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/**
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/**
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* @brief We provide our own pm_off() function for all STM32-based CPUs
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* @brief We provide our own pm_off() function for all STM32-based CPUs
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*/
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*/
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