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cpu/stm32f0: make use of CPU_LINE and STM32_FLASHSIZE

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This commit is contained in:
Vincent Dupont 2018-06-18 19:19:08 +02:00
parent e1ce7e5026
commit 26cb3d8953
3 changed files with 259 additions and 43 deletions
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46
cpu/stm32f0/include/cpu_conf.h
View File

@ -25,27 +25,8 @@
#include "cpu_conf_common.h"
#ifdef CPU_MODEL_STM32F051R8
#include "vendor/stm32f051x8.h"
#endif
#ifdef CPU_MODEL_STM32F091RC
#include "vendor/stm32f091xc.h"
#endif
#ifdef CPU_MODEL_STM32F072RB
#include "vendor/stm32f072xb.h"
#endif
#ifdef CPU_MODEL_STM32F070RB
#include "vendor/stm32f070xb.h"
#endif
#ifdef CPU_MODEL_STM32F030R8
#include "vendor/stm32f030x8.h"
#endif
#ifdef CPU_MODEL_STM32F042K6
#include "vendor/stm32f042x6.h"
#endif
#ifdef CPU_MODEL_STM32F031K6
#include "vendor/stm32f031x6.h"
#endif
#include "vendor/stm32f0xx.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -55,13 +36,13 @@ extern "C" {
* @{
*/
#define CPU_DEFAULT_IRQ_PRIO (1U)
#if defined(CPU_MODEL_STM32F030R8)
#if defined(CPU_LINE_STM32F030x8)
#define CPU_IRQ_NUMOF (29U)
#elif defined(CPU_MODEL_STM32F031K6)
#elif defined(CPU_LINE_STM32F031x6)
#define CPU_IRQ_NUMOF (28U)
#elif defined(CPU_MODEL_STM32F051R8) || defined(CPU_MODEL_STM32F091RC)
#elif defined(CPU_LINE_STM32F051x8) || defined(CPU_LINE_STM32F091xC)
#define CPU_IRQ_NUMOF (31U)
#else /* CPU_MODEL_STM32F042K6, CPU_MODEL_STM32F070RB, CPU_MODEL_STM32F072RB */
#else
#define CPU_IRQ_NUMOF (32U)
#endif
/** @} */
@ -74,21 +55,14 @@ extern "C" {
*
* @{
*/
#if defined(CPU_MODEL_STM32F091RC) || defined(CPU_MODEL_STM32F072RB)
#if defined(CPU_LINE_STM32F091xC) || defined(CPU_LINE_STM32F072xB)
#define FLASHPAGE_SIZE (2048U)
#elif defined(CPU_MODEL_STM32F051R8) || defined(CPU_MODEL_STM32F042K6) \
|| defined(CPU_MODEL_STM32F070RB) || defined(CPU_MODEL_STM32F030R8)
#elif defined(CPU_LINE_STM32F051x8) || defined(CPU_LINE_STM32F042x6) \
|| defined(CPU_LINE_STM32F070xB) || defined(CPU_LINE_STM32F030x8)
#define FLASHPAGE_SIZE (1024U)
#endif
#if defined(CPU_MODEL_STM32F091RC)
#define FLASHPAGE_NUMOF (128U)
#elif defined(CPU_MODEL_STM32F051R8) || defined(CPU_MODEL_STM32F072RB) \
|| defined(CPU_MODEL_STM32F030R8) || defined(CPU_MODEL_STM32F070RB)
#define FLASHPAGE_NUMOF (64U)
#elif defined(CPU_MODEL_STM32F042K6)
#define FLASHPAGE_NUMOF (32U)
#endif
#define FLASHPAGE_NUMOF (STM32_FLASHSIZE / FLASHPAGE_SIZE)
/* The minimum block size which can be written is 2B. However, the erase
* block is always FLASHPAGE_SIZE.

242
cpu/stm32f0/include/vendor/stm32f0xx.h vendored Normal file
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@ -0,0 +1,242 @@
/**
******************************************************************************
* @file stm32f0xx.h
* @author MCD Application Team
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
* is using in the C source code, usually in main.c. This file contains:
* - Configuration section that allows to select:
* - The STM32F0xx device used in the target application
* - To use or not the peripheral’s drivers in application code(i.e.
* code will be based on direct access to peripheral’s registers
* rather than drivers API), this option is controlled by
* "#define USE_HAL_DRIVER"
*
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f0xx
* @{
*/
#ifndef __STM32F0xx_H
#define __STM32F0xx_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/** @addtogroup Library_configuration_section
* @{
*/
/**
* @brief STM32 Family
*/
#if !defined (STM32F0)
#define STM32F0
#endif /* STM32F0 */
/* Uncomment the line below according to the target STM32 device used in your
application
*/
#if !defined (STM32F030x6) && !defined (STM32F030x8) && \
!defined (STM32F031x6) && !defined (STM32F038xx) && \
!defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
!defined (STM32F051x8) && !defined (STM32F058xx) && \
!defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \
!defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC)
/* #define STM32F030x6 */ /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
/* #define STM32F030x8 */ /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes) */
/* #define STM32F031x6 */ /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
/* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */
/* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
/* #define STM32F048x6 */ /*!< STM32F048xx Devices (STM32F042xx microcontrollers where the Flash memory is 32 Kbytes) */
/* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
/* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */
/* #define STM32F070x6 */ /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
/* #define STM32F070xB */ /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
/* #define STM32F071xB */ /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
/* #define STM32F072xB */ /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
/* #define STM32F078xx */ /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes) */
/* #define STM32F030xC */ /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes) */
/* #define STM32F091xC */ /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes) */
/* #define STM32F098xx */ /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes) */
#endif
/* Tip: To avoid modifying this file each time you need to switch between these
devices, you can define the device in your toolchain compiler preprocessor.
*/
#if !defined (USE_HAL_DRIVER)
/**
* @brief Comment the line below if you will not use the peripherals drivers.
In this case, these drivers will not be included and the application code will
be based on direct access to peripherals registers
*/
/*#define USE_HAL_DRIVER */
#endif /* USE_HAL_DRIVER */
/**
* @brief CMSIS Device version number V2.3.2
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32F0_DEVICE_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
|(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
|(__STM32F0_DEVICE_VERSION_RC))
/**
* @}
*/
/** @addtogroup Device_Included
* @{
*/
#if defined(STM32F030x6)
#include "stm32f030x6.h"
#elif defined(STM32F030x8)
#include "stm32f030x8.h"
#elif defined(STM32F031x6)
#include "stm32f031x6.h"
#elif defined(STM32F038xx)
#include "stm32f038xx.h"
#elif defined(STM32F042x6)
#include "stm32f042x6.h"
#elif defined(STM32F048xx)
#include "stm32f048xx.h"
#elif defined(STM32F051x8)
#include "stm32f051x8.h"
#elif defined(STM32F058xx)
#include "stm32f058xx.h"
#elif defined(STM32F070x6)
#include "stm32f070x6.h"
#elif defined(STM32F070xB)
#include "stm32f070xb.h"
#elif defined(STM32F071xB)
#include "stm32f071xb.h"
#elif defined(STM32F072xB)
#include "stm32f072xb.h"
#elif defined(STM32F078xx)
#include "stm32f078xx.h"
#elif defined(STM32F091xC)
#include "stm32f091xc.h"
#elif defined(STM32F098xx)
#include "stm32f098xx.h"
#elif defined(STM32F030xC)
#include "stm32f030xc.h"
#else
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
#endif
/**
* @}
*/
/** @addtogroup Exported_types
* @{
*/
typedef enum
{
RESET = 0,
SET = !RESET
} FlagStatus, ITStatus;
typedef enum
{
DISABLE = 0,
ENABLE = !DISABLE
} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum
{
ERROR = 0,
SUCCESS = !ERROR
} ErrorStatus;
/**
* @}
*/
/** @addtogroup Exported_macros
* @{
*/
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define READ_BIT(REG, BIT) ((REG) & (BIT))
#define CLEAR_REG(REG) ((REG) = (0x0))
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
#define READ_REG(REG) ((REG))
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
/**
* @}
*/
#if defined (USE_HAL_DRIVER)
#include "stm32f0xx_hal.h"
#endif /* USE_HAL_DRIVER */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __STM32F0xx_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
cpu/stm32f0/vectors.c
View File

@ -80,7 +80,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[22] = isr_tim17, /* [22] TIM17 global Interrupt */
[25] = isr_spi1, /* [25] SPI1 global Interrupt */
#if defined(CPU_MODEL_STM32F030R8)
#if defined(CPU_LINE_STM32F030x8)
[ 4] = isr_rcc, /* [ 4] RCC global Interrupt */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupt */
[ 6] = isr_exti, /* [ 6] EXTI Line 2 and 3 Interrupt */
@ -97,7 +97,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[26] = isr_spi2, /* [26] SPI2 global Interrupt */
[27] = isr_usart1, /* [27] USART1 global Interrupt */
[28] = isr_usart2, /* [28] USART2 global Interrupt */
#elif defined(CPU_MODEL_STM32F031K6)
#elif defined(CPU_LINE_STM32F031x6)
[ 1] = isr_pvd, /* [ 1] PVD Interrupt through EXTI Lines 16 */
[ 4] = isr_rcc, /* [ 4] RCC global Interrupt */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupt */
@ -111,7 +111,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[15] = isr_tim2, /* [15] TIM2 global Interrupt */
[23] = isr_i2c1, /* [23] I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
[27] = isr_usart1, /* [27] USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
#elif defined(CPU_MODEL_STM32F042K6)
#elif defined(CPU_LINE_STM32F042x6)
[ 1] = isr_pvd_vddio2, /* [ 1] PVD & VDDIO2 Interrupts through EXTI Lines 16 and 31 */
[ 4] = isr_rcc_crs, /* [ 4] RCC & CRS Global Interrupts */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupts */
@ -130,7 +130,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[28] = isr_usart2, /* [28] USART2 global Interrupt */
[30] = isr_cec_can, /* [30] CEC and CAN global Interrupts & EXTI Line27 Interrupt */
[31] = isr_usb, /* [31] USB global Interrupts & EXTI Line18 Interrupt */
#elif defined(CPU_MODEL_STM32F051R8)
#elif defined(CPU_LINE_STM32F051x8)
[ 1] = isr_pvd, /* [ 1] PVD Interrupt through EXTI Lines 16 */
[ 4] = isr_rcc, /* [ 4] RCC global Interrupt */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupts */
@ -151,7 +151,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[27] = isr_usart1, /* [27] USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
[28] = isr_usart2, /* [28] USART2 global Interrupt */
[30] = isr_cec_can, /* [30] CEC and CAN global Interrupts & EXTI Line27 Interrupt */
#elif defined(CPU_MODEL_STM32F070RB)
#elif defined(CPU_LINE_STM32F070xB)
[ 4] = isr_rcc, /* [ 4] RCC global Interrupt */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupt */
[ 6] = isr_exti, /* [ 6] EXTI Line 2 and 3 Interrupt */
@ -171,7 +171,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[28] = isr_usart2, /* [28] USART2 global Interrupt */
[29] = isr_usart3_4, /* [29] USART3 and USART4 global Interrupt */
[31] = isr_usb, /* [31] USB global Interrupt & EXTI Line18 Interrupt */
#elif defined(CPU_MODEL_STM32F072RB)
#elif defined(CPU_LINE_STM32F072xB)
[ 1] = isr_pvd_vddio2, /* [ 1] PVD & VDDIO2 Interrupt through EXTI Lines 16 and 31 */
[ 4] = isr_rcc_crs, /* [ 4] RCC & CRS global Interrupt */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupt */
@ -195,7 +195,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[29] = isr_usart3_4, /* [29] USART3 and USART4 global Interrupt */
[30] = isr_cec_can, /* [30] CEC and CAN global Interrupts & EXTI Line27 Interrupt */
[31] = isr_usb, /* [31] USB global Interrupt & EXTI Line18 Interrupt */
#elif defined(CPU_MODEL_STM32F091RC)
#elif defined(CPU_LINE_STM32F091xC)
[ 1] = isr_pvd_vddio2, /* [ 1] PVD & VDDIO2 Interrupts through EXTI Lines 16 and 31 */
[ 4] = isr_rcc_crs, /* [ 4] RCC & CRS global Interrupts */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupts */