From 28bc25abb4e6443137629b9f2cb21ea2b8be6ad4 Mon Sep 17 00:00:00 2001 From: Frits Kuipers Date: Thu, 15 Dec 2016 15:46:30 +0100 Subject: [PATCH] boards/nucleo-f4xx: Added second and third SPI definition --- boards/nucleo-f401/include/periph_conf.h | 20 ++++++++++++++++++++ boards/nucleo-f446/include/periph_conf.h | 20 ++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/boards/nucleo-f401/include/periph_conf.h b/boards/nucleo-f401/include/periph_conf.h index 2eda73b7aa..444fab10e0 100644 --- a/boards/nucleo-f401/include/periph_conf.h +++ b/boards/nucleo-f401/include/periph_conf.h @@ -174,6 +174,26 @@ static const spi_conf_t spi_config[] = { .af = GPIO_AF5, .rccmask = RCC_APB2ENR_SPI1EN, .apbbus = APB2 + }, + { + .dev = SPI2, + .mosi_pin = GPIO_PIN(PORT_B, 15), + .miso_pin = GPIO_PIN(PORT_B, 14), + .sclk_pin = GPIO_PIN(PORT_B, 13), + .cs_pin = GPIO_PIN(PORT_B, 12), + .af = GPIO_AF5, + .rccmask = RCC_APB1ENR_SPI2EN, + .apbbus = APB1 + }, + { + .dev = SPI3, + .mosi_pin = GPIO_PIN(PORT_C, 12), + .miso_pin = GPIO_PIN(PORT_C, 11), + .sclk_pin = GPIO_PIN(PORT_C, 10), + .cs_pin = GPIO_UNDEF, + .af = GPIO_AF6, + .rccmask = RCC_APB1ENR_SPI3EN, + .apbbus = APB1 } }; diff --git a/boards/nucleo-f446/include/periph_conf.h b/boards/nucleo-f446/include/periph_conf.h index 5a129bb218..2cdf10bce9 100644 --- a/boards/nucleo-f446/include/periph_conf.h +++ b/boards/nucleo-f446/include/periph_conf.h @@ -200,6 +200,26 @@ static const spi_conf_t spi_config[] = { .af = GPIO_AF5, .rccmask = RCC_APB2ENR_SPI1EN, .apbbus = APB2 + }, + { + .dev = SPI2, + .mosi_pin = GPIO_PIN(PORT_B, 15), + .miso_pin = GPIO_PIN(PORT_B, 14), + .sclk_pin = GPIO_PIN(PORT_B, 13), + .cs_pin = GPIO_PIN(PORT_B, 12), + .af = GPIO_AF5, + .rccmask = RCC_APB1ENR_SPI2EN, + .apbbus = APB1 + }, + { + .dev = SPI3, + .mosi_pin = GPIO_PIN(PORT_C, 12), + .miso_pin = GPIO_PIN(PORT_C, 11), + .sclk_pin = GPIO_PIN(PORT_C, 10), + .cs_pin = GPIO_UNDEF, + .af = GPIO_AF6, + .rccmask = RCC_APB1ENR_SPI3EN, + .apbbus = APB1 } };