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cpu: efm32: add support for 32-bit timers

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This commit is contained in:
Bas Stottelaar 2018-07-09 23:34:36 +02:00
parent 22d59cbb08
commit 28d0e46882
1 changed files with 18 additions and 3 deletions
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21
cpu/efm32/periph/timer.c
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@ -38,6 +38,20 @@
*/ */
static timer_isr_ctx_t isr_ctx[TIMER_NUMOF]; static timer_isr_ctx_t isr_ctx[TIMER_NUMOF];
/**
* @brief Check whether device is a using a WTIMER device (32-bit)
*/
static inline bool _is_wtimer(timer_t dev)
{
#if defined(WTIMER_COUNT) && WTIMER_COUNT > 0
return ((uint32_t) timer_config[dev].timer.dev) >= WTIMER0_BASE;
#else
(void) dev;
return false;
#endif
}
int timer_init(tim_t dev, unsigned long freq, timer_cb_t callback, void *arg) int timer_init(tim_t dev, unsigned long freq, timer_cb_t callback, void *arg)
{ {
TIMER_TypeDef *pre, *tim; TIMER_TypeDef *pre, *tim;
@ -82,7 +96,7 @@ int timer_init(tim_t dev, unsigned long freq, timer_cb_t callback, void *arg)
freq_timer / TIMER_Prescaler2Div(init_pre.prescale) / freq) - 1; freq_timer / TIMER_Prescaler2Div(init_pre.prescale) / freq) - 1;
TIMER_TopSet(pre, top); TIMER_TopSet(pre, top);
TIMER_TopSet(tim, 0xffff); TIMER_TopSet(tim, _is_wtimer(dev) ? 0xffffffff : 0xffff);
/* enable interrupts for the channels */ /* enable interrupts for the channels */
TIMER_IntClear(tim, TIMER_IFC_CC0 | TIMER_IFC_CC1 | TIMER_IFC_CC2); TIMER_IntClear(tim, TIMER_IFC_CC0 | TIMER_IFC_CC1 | TIMER_IFC_CC2);
@ -106,12 +120,13 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
return -1; return -1;
} }
if (value > 0xffff) { /* this accounts for some timer being 16-bit and others 32-bit */
if (value > TIMER_TopGet(timer_config[dev].timer.dev)) {
return -1; return -1;
} }
tim = timer_config[dev].timer.dev; tim = timer_config[dev].timer.dev;
tim->CC[channel].CCV = (uint16_t)value; tim->CC[channel].CCV = (uint32_t) value;
tim->CC[channel].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE; tim->CC[channel].CTRL = TIMER_CC_CTRL_MODE_OUTPUTCOMPARE;
return 0; return 0;