cpu/stm32f[3|4] adapted PWM driver
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@ -167,22 +167,7 @@ void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
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return;
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}
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switch (channel) {
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case 0:
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tim->CCR1 = value;
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break;
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case 1:
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tim->CCR2 = value;
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break;
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case 2:
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tim->CCR3 = value;
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break;
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case 3:
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tim->CCR4 = value;
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break;
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default:
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return;
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}
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tim->CCR[channel] = value;
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}
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void pwm_start(pwm_t dev)
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@ -102,17 +102,17 @@ uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
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/* Reset C/C and timer configuration register */
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switch (channels) {
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case 4:
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tim->CCR4 = 0;
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tim->CCR[3] = 0;
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/* Fall through */
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case 3:
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tim->CCR3 = 0;
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tim->CCR[2] = 0;
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tim->CR2 = 0;
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/* Fall through */
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case 2:
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tim->CCR2 = 0;
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tim->CCR[1] = 0;
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/* Fall through */
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case 1:
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tim->CCR1 = 0;
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tim->CCR[0] = 0;
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tim->CR1 = 0;
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break;
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}
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@ -211,22 +211,7 @@ void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
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value = (uint32_t)tim->ARR;
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}
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switch (channel) {
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case 0:
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tim->CCR1 = value;
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break;
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case 1:
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tim->CCR2 = value;
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break;
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case 2:
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tim->CCR3 = value;
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break;
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case 3:
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tim->CCR4 = value;
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break;
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default:
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return;
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}
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tim->CCR[channel] = value;
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}
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void pwm_start(pwm_t dev)
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