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cpu/stm32f[3|4] adapted PWM driver

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This commit is contained in:
Hauke Petersen 2016-12-07 12:55:59 +01:00
parent 0aa70faa3d
commit 2a62ec5f6b
2 changed files with 6 additions and 36 deletions
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17
cpu/stm32f3/periph/pwm.c
View File

@ -167,22 +167,7 @@ void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
return; return;
} }
switch (channel) { tim->CCR[channel] = value;
case 0:
tim->CCR1 = value;
break;
case 1:
tim->CCR2 = value;
break;
case 2:
tim->CCR3 = value;
break;
case 3:
tim->CCR4 = value;
break;
default:
return;
}
} }
void pwm_start(pwm_t dev) void pwm_start(pwm_t dev)

25
cpu/stm32f4/periph/pwm.c
View File

@ -102,17 +102,17 @@ uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
/* Reset C/C and timer configuration register */ /* Reset C/C and timer configuration register */
switch (channels) { switch (channels) {
case 4: case 4:
tim->CCR4 = 0; tim->CCR[3] = 0;
/* Fall through */ /* Fall through */
case 3: case 3:
tim->CCR3 = 0; tim->CCR[2] = 0;
tim->CR2 = 0; tim->CR2 = 0;
/* Fall through */ /* Fall through */
case 2: case 2:
tim->CCR2 = 0; tim->CCR[1] = 0;
/* Fall through */ /* Fall through */
case 1: case 1:
tim->CCR1 = 0; tim->CCR[0] = 0;
tim->CR1 = 0; tim->CR1 = 0;
break; break;
} }
@ -211,22 +211,7 @@ void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
value = (uint32_t)tim->ARR; value = (uint32_t)tim->ARR;
} }
switch (channel) { tim->CCR[channel] = value;
case 0:
tim->CCR1 = value;
break;
case 1:
tim->CCR2 = value;
break;
case 2:
tim->CCR3 = value;
break;
case 3:
tim->CCR4 = value;
break;
default:
return;
}
} }
void pwm_start(pwm_t dev) void pwm_start(pwm_t dev)