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Merge pull request #4071 from thomaseichinger/hauke-fix-gpio-gpiodev

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drivers/gpio: renamed GPIO(x,y) macro to GPIO_PIN
This commit is contained in:
Thomas Eichinger 2015-10-13 16:05:19 +02:00
commit 2b29abed8e
43 changed files with 154 additions and 154 deletions
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22
boards/fox/include/board.h
View File

@ -52,10 +52,10 @@ extern "C" {
* @{
*/
#define AT86RF231_SPI SPI_0
#define AT86RF231_CS GPIO(PORT_A,1)
#define AT86RF231_INT GPIO(PORT_C,2)
#define AT86RF231_RESET GPIO(PORT_C,1)
#define AT86RF231_SLEEP GPIO(PORT_A,0)
#define AT86RF231_CS GPIO_PIN(PORT_A,1)
#define AT86RF231_INT GPIO_PIN(PORT_C,2)
#define AT86RF231_RESET GPIO_PIN(PORT_C,1)
#define AT86RF231_SLEEP GPIO_PIN(PORT_A,0)
/** @} */
/**
@ -72,8 +72,8 @@ extern "C" {
*/
#define L3G4200D_I2C I2C_0
#define L3G4200D_ADDR 0x68
#define L3G4200D_DRDY GPIO(PORT_B,8)
#define L3G4200D_INT GPIO(PORT_B,11)
#define L3G4200D_DRDY GPIO_PIN(PORT_B,8)
#define L3G4200D_INT GPIO_PIN(PORT_B,11)
/** @} */
/**
@ -83,9 +83,9 @@ extern "C" {
#define LSM303DLHC_I2C I2C_0
#define LSM303DLHC_ACC_ADDR (25)
#define LSM303DLHC_MAG_ADDR (30)
#define LSM303DLHC_INT1 GPIO(PORT_B,9)
#define LSM303DLHC_INT2 GPIO(PORT_B,5)
#define LSM303DLHC_DRDY GPIO(PORT_A,9)
#define LSM303DLHC_INT1 GPIO_PIN(PORT_B,9)
#define LSM303DLHC_INT2 GPIO_PIN(PORT_B,5)
#define LSM303DLHC_DRDY GPIO_PIN(PORT_A,9)
/** @} */
/**
@ -94,10 +94,10 @@ extern "C" {
*/
#define LED_RED_PORT (GPIOB)
#define LED_RED_PIN (10)
#define LED_RED_GPIO GPIO(PORT_B,10)
#define LED_RED_GPIO GPIO_PIN(PORT_B,10)
#define LED_GREEN_PORT (GPIOB)
#define LED_GREEN_PIN (12)
#define LED_GREEN_GPIO GPIO(PORT_B,12)
#define LED_GREEN_GPIO GPIO_PIN(PORT_B,12)
/** @} */
/**

18
boards/fox/include/periph_conf.h
View File

@ -94,8 +94,8 @@ extern "C" {
#define UART_0_ISR isr_usart2
#define UART_0_BUS_FREQ 36000000
/* UART 0 pin configuration */
#define UART_0_RX_PIN GPIO(PORT_A,3)
#define UART_0_TX_PIN GPIO(PORT_A,2)
#define UART_0_RX_PIN GPIO_PIN(PORT_A,3)
#define UART_0_TX_PIN GPIO_PIN(PORT_A,2)
/* UART 1 device configuration */
#define UART_1_DEV USART1
@ -104,8 +104,8 @@ extern "C" {
#define UART_1_ISR isr_usart1
#define UART_1_BUS_FREQ 72000000
/* UART 1 pin configuration */
#define UART_1_RX_PIN GPIO(PORT_A,10)
#define UART_1_TX_PIN GPIO(PORT_A,9)
#define UART_1_RX_PIN GPIO_PIN(PORT_A,10)
#define UART_1_TX_PIN GPIO_PIN(PORT_A,9)
/** @} */
/**
@ -121,9 +121,9 @@ extern "C" {
#define SPI_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN))
#define SPI_0_BUS_DIV 0 /* 1 -> SPI runs with full CPU clock, 0 -> half CPU clock */
/* SPI 0 pin configuration */
#define SPI_0_CLK_PIN GPIO(PORT_B,13)
#define SPI_0_MOSI_PIN GPIO(PORT_B,15)
#define SPI_0_MISO_PIN GPIO(PORT_B,14)
#define SPI_0_CLK_PIN GPIO_PIN(PORT_B,13)
#define SPI_0_MOSI_PIN GPIO_PIN(PORT_B,15)
#define SPI_0_MISO_PIN GPIO_PIN(PORT_B,14)
/** @} */
/**
@ -159,8 +159,8 @@ extern "C" {
#define I2C_0_ERR_IRQ I2C1_ER_IRQn
#define I2C_0_ERR_ISR isr_i2c1_er
/* I2C 0 pin configuration */
#define I2C_0_SCL_PIN GPIO(PORT_B,6)
#define I2C_0_SDA_PIN GPIO(PORT_B,7)
#define I2C_0_SCL_PIN GPIO_PIN(PORT_B,6)
#define I2C_0_SDA_PIN GPIO_PIN(PORT_B,7)
/** @} */
#ifdef __cplusplus

30
boards/iotlab-m3/include/board.h
View File

@ -57,10 +57,10 @@ extern "C" {
* @{
*/
#define AT86RF231_SPI SPI_0
#define AT86RF231_CS GPIO(PORT_A,4)
#define AT86RF231_INT GPIO(PORT_C,4)
#define AT86RF231_RESET GPIO(PORT_C,1)
#define AT86RF231_SLEEP GPIO(PORT_A,2)
#define AT86RF231_CS GPIO_PIN(PORT_A,4)
#define AT86RF231_INT GPIO_PIN(PORT_C,4)
#define AT86RF231_RESET GPIO_PIN(PORT_C,1)
#define AT86RF231_SLEEP GPIO_PIN(PORT_A,2)
#define AT86RF231_SPI_CLK SPI_SPEED_5MHZ
/** @} */
@ -69,9 +69,9 @@ extern "C" {
* @{
*/
#define EXTFLASH_SPI SPI_1
#define EXTFLASH_CS GPIO(PORT_A,11)
#define EXTFLASH_WRITE GPIO(PORT_C,6)
#define EXTFLASH_HOLD GPIO(PORT_C,9)
#define EXTFLASH_CS GPIO_PIN(PORT_A,11)
#define EXTFLASH_WRITE GPIO_PIN(PORT_C,6)
#define EXTFLASH_HOLD GPIO_PIN(PORT_C,9)
/** @} */
/**
@ -96,8 +96,8 @@ extern "C" {
*/
#define L3G4200D_I2C I2C_0
#define L3G4200D_ADDR 0x68
#define L3G4200D_DRDY GPIO(PORT_C,0)
#define L3G4200D_INT GPIO(PORT_C,5)
#define L3G4200D_DRDY GPIO_PIN(PORT_C,0)
#define L3G4200D_INT GPIO_PIN(PORT_C,5)
/** @} */
/**
@ -107,9 +107,9 @@ extern "C" {
#define LSM303DLHC_I2C I2C_0
#define LSM303DLHC_ACC_ADDR (0x19)
#define LSM303DLHC_MAG_ADDR (0x1e)
#define LSM303DLHC_INT1 GPIO(PORT_B,12)
#define LSM303DLHC_INT2 GPIO(PORT_B,1)
#define LSM303DLHC_DRDY GPIO(PORT_B,2)
#define LSM303DLHC_INT1 GPIO_PIN(PORT_B,12)
#define LSM303DLHC_INT2 GPIO_PIN(PORT_B,1)
#define LSM303DLHC_DRDY GPIO_PIN(PORT_B,2)
/** @} */
/**
@ -118,13 +118,13 @@ extern "C" {
*/
#define LED_RED_PORT (GPIOD)
#define LED_RED_PIN (2)
#define LED_RED_GPIO GPIO(PORT_D,2)
#define LED_RED_GPIO GPIO_PIN(PORT_D,2)
#define LED_GREEN_PORT (GPIOB)
#define LED_GREEN_PIN (5)
#define LED_GREEN_GPIO GPIO(PORT_B,5)
#define LED_GREEN_GPIO GPIO_PIN(PORT_B,5)
#define LED_ORANGE_PORT (GPIOC)
#define LED_ORANGE_PIN (10)
#define LED_ORANGE_GPIO GPIO(PORT_C,10)
#define LED_ORANGE_GPIO GPIO_PIN(PORT_C,10)
/** @} */
/**

18
boards/iotlab-m3/include/periph_conf.h
View File

@ -95,8 +95,8 @@ extern "C" {
#define UART_0_ISR isr_usart1
#define UART_0_BUS_FREQ 72000000
/* UART 0 pin configuration */
#define UART_0_RX_PIN GPIO(PORT_A,10)
#define UART_0_TX_PIN GPIO(PORT_A,9)
#define UART_0_RX_PIN GPIO_PIN(PORT_A,10)
#define UART_0_TX_PIN GPIO_PIN(PORT_A,9)
/* UART 1 device configuration */
#define UART_1_DEV USART2
@ -105,8 +105,8 @@ extern "C" {
#define UART_1_ISR isr_usart2
#define UART_1_BUS_FREQ 36000000
/* UART 1 pin configuration */
#define UART_1_RX_PIN GPIO(PORT_A,3)
#define UART_1_TX_PIN GPIO(PORT_A,2)
#define UART_1_RX_PIN GPIO_PIN(PORT_A,3)
#define UART_1_TX_PIN GPIO_PIN(PORT_A,2)
/** @} */
/**
@ -122,9 +122,9 @@ extern "C" {
#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
#define SPI_0_BUS_DIV 1 /* 1 -> SPI runs with full CPU clock, 0 -> half CPU clock */
/* SPI 0 pin configuration */
#define SPI_0_CLK_PIN GPIO(PORT_A,5)
#define SPI_0_MOSI_PIN GPIO(PORT_A,7)
#define SPI_0_MISO_PIN GPIO(PORT_A,6)
#define SPI_0_CLK_PIN GPIO_PIN(PORT_A,5)
#define SPI_0_MOSI_PIN GPIO_PIN(PORT_A,7)
#define SPI_0_MISO_PIN GPIO_PIN(PORT_A,6)
/** @} */
/**
@ -160,8 +160,8 @@ extern "C" {
#define I2C_0_ERR_IRQ I2C1_ER_IRQn
#define I2C_0_ERR_ISR isr_i2c1_er
/* I2C 0 pin configuration */
#define I2C_0_SCL_PIN GPIO(PORT_B,6)
#define I2C_0_SDA_PIN GPIO(PORT_B,7)
#define I2C_0_SCL_PIN GPIO_PIN(PORT_B,6)
#define I2C_0_SDA_PIN GPIO_PIN(PORT_B,7)
/** @} */
#ifdef __cplusplus

2
boards/limifrog-v1/include/board.h
View File

@ -51,7 +51,7 @@ extern "C" {
*/
#define LED_RED_PORT (GPIOC)
#define LED_RED_PIN (3)
#define LED_RED_GPIO GPIO(PORT_C,3)
#define LED_RED_GPIO GPIO_PIN(PORT_C,3)
/** @} */
/**

6
boards/msb-430/include/periph_conf.h
View File

@ -82,9 +82,9 @@ extern "C" {
#define SPI_IE_TX_BIT (1 << 7)
#define SPI_ME (SFR->ME1)
#define SPI_ME_BIT (1 << 6)
#define SPI_PIN_MISO GPIO(P5,2)
#define SPI_PIN_MOSI GPIO(P5,1)
#define SPI_PIN_CLK GPIO(P5,3)
#define SPI_PIN_MISO GPIO_PIN(P5,2)
#define SPI_PIN_MOSI GPIO_PIN(P5,1)
#define SPI_PIN_CLK GPIO_PIN(P5,3)
/** @} */
#ifdef __cplusplus

6
boards/msb-430h/include/periph_conf.h
View File

@ -84,9 +84,9 @@ extern "C" {
#define SPI_IE_TX_BIT (1 << 7)
#define SPI_ME (SFR->ME1)
#define SPI_ME_BIT (1 << 6)
#define SPI_PIN_MISO GPIO(P3,2)
#define SPI_PIN_MOSI GPIO(P3,1)
#define SPI_PIN_CLK GPIO(P3,3)
#define SPI_PIN_MISO GPIO_PIN(P3,2)
#define SPI_PIN_MOSI GPIO_PIN(P3,1)
#define SPI_PIN_CLK GPIO_PIN(P3,3)
/** @} */
#ifdef __cplusplus

8
boards/msbiot/include/board.h
View File

@ -40,10 +40,10 @@ extern "C" {
* @{
*/
#define CC110X_SPI SPI_0
#define CC110X_CS GPIO(PORT_B, 12)
#define CC110X_GDO0 GPIO(PORT_C, 4)
#define CC110X_GDO1 GPIO(PORT_A, 6)
#define CC110X_GDO2 GPIO(PORT_C, 5)
#define CC110X_CS GPIO_PIN(PORT_B, 12)
#define CC110X_GDO0 GPIO_PIN(PORT_C, 4)
#define CC110X_GDO1 GPIO_PIN(PORT_A, 6)
#define CC110X_GDO2 GPIO_PIN(PORT_C, 5)
/** @} */
/**

4
boards/nucleo-l1/include/periph_conf.h
View File

@ -72,8 +72,8 @@ static const timer_conf_t timer_config[] = {
#define UART_0_ISR isr_usart2
#define UART_0_BUS_FREQ 32000000
/* UART 0 pin configuration */
#define UART_0_RX_PIN GPIO(PORT_A, 3)
#define UART_0_TX_PIN GPIO(PORT_A, 2)
#define UART_0_RX_PIN GPIO_PIN(PORT_A, 3)
#define UART_0_TX_PIN GPIO_PIN(PORT_A, 2)
#define UART_0_AF GPIO_AF7
/**

2
boards/saml21-xpro/board.c
View File

@ -44,5 +44,5 @@ void board_init(void)
*/
void led_init(void)
{
gpio_init(GPIO(PB,10), GPIO_DIR_OUT, GPIO_NOPULL);
gpio_init(GPIO_PIN(PB,10), GPIO_DIR_OUT, GPIO_NOPULL);
}

16
boards/samr21-xpro/include/board.h
View File

@ -46,10 +46,10 @@ extern "C" {
* @{
*/
#define AT86RF233_SPI (SPI_0)
#define AT86RF233_CS GPIO(PB, 31)
#define AT86RF233_INT GPIO(PB, 0)
#define AT86RF233_RESET GPIO(PB, 15)
#define AT86RF233_SLEEP GPIO(PA, 20)
#define AT86RF233_CS GPIO_PIN(PB, 31)
#define AT86RF233_INT GPIO_PIN(PB, 0)
#define AT86RF233_RESET GPIO_PIN(PB, 15)
#define AT86RF233_SLEEP GPIO_PIN(PA, 20)
#define AT86RF233_SPI_CLK (SPI_SPEED_1MHZ)
/** @}*/
@ -58,10 +58,10 @@ extern "C" {
* @{
*/
#define AT86RF231_SPI SPI_0
#define AT86RF231_CS GPIO(PB, 31)
#define AT86RF231_INT GPIO(PB, 0)
#define AT86RF231_RESET GPIO(PB, 15)
#define AT86RF231_SLEEP GPIO(PA, 20)
#define AT86RF231_CS GPIO_PIN(PB, 31)
#define AT86RF231_INT GPIO_PIN(PB, 0)
#define AT86RF231_RESET GPIO_PIN(PB, 15)
#define AT86RF231_SLEEP GPIO_PIN(PA, 20)
#define AT86RF231_SPI_SPEED SPI_SPEED_1MHZ
/** @} */

4
boards/samr21-xpro/include/periph_conf.h
View File

@ -111,8 +111,8 @@ extern "C" {
/* UART device configuration */
static const uart_conf_t uart_config[] = {
/* device, RX pin, TX pin, mux */
{&SERCOM0->USART, GPIO(PA,5), GPIO(PA,4), GPIO_MUX_D},
{&SERCOM5->USART, GPIO(PA,23), GPIO(PA,22), GPIO_MUX_D},
{&SERCOM0->USART, GPIO_PIN(PA,5), GPIO_PIN(PA,4), GPIO_MUX_D},
{&SERCOM5->USART, GPIO_PIN(PA,23), GPIO_PIN(PA,22), GPIO_MUX_D},
};
/* interrupt function name mapping */

10
boards/spark-core/include/board.h
View File

@ -81,16 +81,16 @@
/**
* @name User button configuration
*/
#define BUTTON1 GPIO(PORT_B,2)
#define BUTTON1 GPIO_PIN(PORT_B,2)
/**
* @name CC3000 pin configuration
* @{
*/
#define CC3000_SPI SPI_0
#define CC3000_CS GPIO(PORT_B,12)
#define CC3000_EN GPIO(PORT_B,8)
#define CC3000_INT GPIO(PORT_B,11)
#define CC3000_CS GPIO_PIN(PORT_B,12)
#define CC3000_EN GPIO_PIN(PORT_B,8)
#define CC3000_INT GPIO_PIN(PORT_B,11)
/** @} */
/**
@ -98,7 +98,7 @@
* @{
*/
#define EXTFLASH_SPI SPI_0
#define EXTFLASH GPIO(PORT_B,9)
#define EXTFLASH GPIO_PIN(PORT_B,9)
/** @} */
/**

10
boards/spark-core/include/periph_conf.h
View File

@ -93,8 +93,8 @@
#define UART_0_ISR isr_usart2
#define UART_0_BUS_FREQ (CLOCK_CORECLOCK/2)
/* UART 0 pin configuration */
#define UART_0_RX_PIN GPIO(PORT_A,3)
#define UART_0_TX_PIN GPIO(PORT_A,2)
#define UART_0_RX_PIN GPIO_PIN(PORT_A,3)
#define UART_0_TX_PIN GPIO_PIN(PORT_A,2)
/** @} */
/**
@ -110,9 +110,9 @@
#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
#define SPI_0_BUS_DIV 0 /* 1 -> SPI runs with full CPU clock, 0 -> half CPU clock */
/* SPI 0 pin configuration */
#define SPI_0_CLK_PIN GPIO(PORT_B,15)
#define SPI_0_MOSI_PIN GPIO(PORT_B,17)
#define SPI_0_MISO_PIN GPIO(PORT_B,16)
#define SPI_0_CLK_PIN GPIO_PIN(PORT_B,15)
#define SPI_0_MOSI_PIN GPIO_PIN(PORT_B,17)
#define SPI_0_MISO_PIN GPIO_PIN(PORT_B,16)
/** @} */
#ifdef __cplusplus

6
boards/telosb/include/periph_conf.h
View File

@ -82,9 +82,9 @@ extern "C" {
#define SPI_IE_TX_BIT (1 << 7)
#define SPI_ME (SFR->ME1)
#define SPI_ME_BIT (1 << 6)
#define SPI_PIN_MISO GPIO(P3,2)
#define SPI_PIN_MOSI GPIO(P3,1)
#define SPI_PIN_CLK GPIO(P3,3)
#define SPI_PIN_MISO GPIO_PIN(P3,2)
#define SPI_PIN_MOSI GPIO_PIN(P3,1)
#define SPI_PIN_CLK GPIO_PIN(P3,3)
/** @} */
#ifdef __cplusplus

6
boards/wsn430-common/include/periph_conf.h
View File

@ -82,9 +82,9 @@ extern "C" {
#define SPI_IE_TX_BIT (1 << 7)
#define SPI_ME (SFR->ME1)
#define SPI_ME_BIT (1 << 6)
#define SPI_PIN_MISO GPIO(P5,2)
#define SPI_PIN_MOSI GPIO(P5,1)
#define SPI_PIN_CLK GPIO(P5,3)
#define SPI_PIN_MISO GPIO_PIN(P5,2)
#define SPI_PIN_MOSI GPIO_PIN(P5,1)
#define SPI_PIN_CLK GPIO_PIN(P5,3)
/** @} */

6
boards/z1/include/periph_conf.h
View File

@ -81,9 +81,9 @@ extern "C" {
#define SPI_IF (SFR->IFG2)
#define SPI_IE_RX_BIT (1 << 2)
#define SPI_IE_TX_BIT (1 << 3)
#define SPI_PIN_MISO GPIO(P3,2)
#define SPI_PIN_MOSI GPIO(P3,1)
#define SPI_PIN_CLK GPIO(P3,3)
#define SPI_PIN_MISO GPIO_PIN(P3,2)
#define SPI_PIN_MOSI GPIO_PIN(P3,1)
#define SPI_PIN_CLK GPIO_PIN(P3,3)
/** @} */
#ifdef __cplusplus

2
cpu/atmega2560/include/periph_cpu.h
View File

@ -29,7 +29,7 @@ extern "C" {
/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO(x, y) ((x << 4) | y)
#define GPIO_PIN(x, y) ((x << 4) | y)
/**
* @brief Available ports on the ATmega2560 family

2
cpu/lpc2387/include/periph_cpu.h
View File

@ -54,7 +54,7 @@ typedef struct {
int gpio_init_mux(unsigned pin, unsigned mux);
void gpio_init_states(void);
#define GPIO(port, pin) (port*32 + pin)
#define GPIO_PIN(port, pin) (port*32 + pin)
#define HAVE_GPIO_PP_T
typedef enum {

2
cpu/msp430fxyz/include/periph_cpu.h
View File

@ -43,7 +43,7 @@ typedef uint16_t gpio_t;
* @brief Mandatory function for defining a GPIO pins
* @{
*/
#define GPIO(x, y) ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0xff))))
#define GPIO_PIN(x, y) ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0xff))))
/**
* @brief Override direction values

2
cpu/nrf51/include/periph_cpu.h
View File

@ -54,7 +54,7 @@ typedef enum {
*
* The port definition is used (and zeroed) to suppress compiler warnings
*/
#define GPIO(x,y) ((x & 0) | y)
#define GPIO_PIN(x,y) ((x & 0) | y)
#ifdef __cplusplus
}

2
cpu/samd21/include/periph_cpu.h
View File

@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
* @brief Mandatory function for defining a GPIO pins
* @{
*/
#define GPIO(x, y) (((gpio_t)(&PORT->Group[x])) | y)
#define GPIO_PIN(x, y) (((gpio_t)(&PORT->Group[x])) | y)
/**
* @brief Available ports on the SAMD21

2
cpu/saml21/include/periph_cpu.h
View File

@ -43,7 +43,7 @@ typedef uint32_t gpio_t;
* @brief Mandatory function for defining a GPIO pins
* @{
*/
#define GPIO(x, y) (((gpio_t)(&PORT->Group[x])) | y)
#define GPIO_PIN(x, y) (((gpio_t)(&PORT->Group[x])) | y)
/**
* @brief Available ports on the SAML21 for convenient access

2
cpu/saml21/periph/spi.c
View File

@ -72,7 +72,7 @@ typedef struct spi_saml21 {
static const spi_saml21_t spi[] = {
#if SPI_0_EN
/* SPI device */ /* MCLK flag */ /* GLCK id */ /* SCLK */ /* MISO */ /* MOSI */ /* dipo+dopo */
{ &(SERCOM0->SPI), MCLK_APBCMASK_SERCOM0, SERCOM0_GCLK_ID_CORE, { GPIO(PA,7), 3 }, { GPIO(PA,4), 3 }, { GPIO(PA,6), 3 }, 0, 1 }
{ &(SERCOM0->SPI), MCLK_APBCMASK_SERCOM0, SERCOM0_GCLK_ID_CORE, { GPIO_PIN(PA,7), 3 }, { GPIO_PIN(PA,4), 3 }, { GPIO_PIN(PA,6), 3 }, 0, 1 }
#endif
};

2
cpu/stm32f1/include/periph_cpu.h
View File

@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO(x, y) ((GPIOA_BASE + (x << 10)) | y)
#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
/**
* @brief Override values for pull register configuration

2
cpu/stm32f3/include/periph_cpu.h
View File

@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO(x, y) ((GPIOA_BASE + (x << 10)) | y)
#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
/**
* @brief Available ports on the STM32F3 family

2
cpu/stm32f4/include/periph_cpu.h
View File

@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO(x, y) ((GPIOA_BASE + (x << 10)) | y)
#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
/**
* @brief Available ports on the STM32F4 family

2
cpu/stm32l1/include/periph_cpu.h
View File

@ -43,7 +43,7 @@ typedef uint32_t gpio_t;
/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO(x, y) ((GPIOA_BASE + (x << 10)) | y)
#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
/**
* @brief Available ports on the STM32L1 family

4
drivers/include/periph/gpio.h
View File

@ -30,8 +30,8 @@ extern "C" {
/**
* @brief Default GPIO macro maps port-pin tuples to the pin value
*/
#ifndef GPIO
#define GPIO(x,y) ((x & 0) | y)
#ifndef GPIO_PIN
#define GPIO_PIN(x,y) ((x & 0) | y)
#endif
/**

2
tests/driver_adt7310/Makefile
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@ -16,7 +16,7 @@ ifneq (,$(TEST_ADT7310_CS))
CFLAGS += -DTEST_ADT7310_CS=$(TEST_ADT7310_CS)
else
# set arbitrary default
CFLAGS += -DTEST_ADT7310_CS=GPIO\(0,0\)
CFLAGS += -DTEST_ADT7310_CS=GPIO_PIN\(0,0\)
endif
include $(RIOTBASE)/Makefile.include

8
tests/driver_at86rf2xx/Makefile
View File

@ -38,22 +38,22 @@ endif
ifneq (,$(ATRF_CS))
CFLAGS += -DATRF_CS=$(ATRF_CS)
else
CFLAGS += -DATRF_CS=GPIO\(0,0\) # set default
CFLAGS += -DATRF_CS=GPIO_PIN\(0,0\) # set default
endif
ifneq (,$(ATRF_INT))
CFLAGS += -DATRF_INT=$(ATRF_INT)
else
CFLAGS += -DATRF_INT=GPIO\(0,1\) # set default
CFLAGS += -DATRF_INT=GPIO_PIN\(0,1\) # set default
endif
ifneq (,$(ATRF_SLEEP))
CFLAGS += -DATRF_SLEEP=$(ATRF_SLEEP)
else
CFLAGS += -DATRF_SLEEP=GPIO\(0,2\) # set default
CFLAGS += -DATRF_SLEEP=GPIO_PIN\(0,2\) # set default
endif
ifneq (,$(ATRF_RESET))
CFLAGS += -DATRF_RESET=$(ATRF_RESET)
else
CFLAGS += -DATRF_RESET=GPIO\(0,3\) # set default
CFLAGS += -DATRF_RESET=GPIO_PIN\(0,3\) # set default
endif
ifneq (,$(ATRF_SPI_SPEED))
CFLAGS += -DATRF_SPI_SPEED=$(ATRF_SPI_SPEED)

4
tests/driver_dht/Makefile
View File

@ -5,7 +5,7 @@ FEATURES_REQUIRED = periph_gpio
# define default pin mappings for some boards:
ifneq (,$(filter stm32f4discovery,$(BOARD)))
export DHT_GPIO ?= GPIO\(4,3\)
export DHT_GPIO ?= GPIO_PIN\(4,3\)
endif
USEMODULE += dht
@ -22,7 +22,7 @@ ifneq (,$(DHT_GPIO))
CFLAGS += -DDHT_GPIO=$(DHT_GPIO)
else
# set random default
CFLAGS += -DDHT_GPIO=GPIO\(0,0\)
CFLAGS += -DDHT_GPIO=GPIO_PIN\(0,0\)
endif
include $(RIOTBASE)/Makefile.include

2
tests/driver_isl29125/Makefile
View File

@ -16,7 +16,7 @@ ifneq (,$(TEST_ISL29125_IRQ_PIN))
CFLAGS += -DTEST_ISL29125_IRQ_PIN=$(TEST_ISL29125_IRQ_PIN)
else
# set random default
CFLAGS += -DTEST_ISL29125_IRQ_PIN=GPIO\(0,0\)
CFLAGS += -DTEST_ISL29125_IRQ_PIN=GPIO_PIN\(0,0\)
endif
include $(RIOTBASE)/Makefile.include

4
tests/driver_kw2xrf/Makefile
View File

@ -37,12 +37,12 @@ endif
ifneq (,$(KWRF_CS))
CFLAGS += -DKWRF_CS=$(KWRF_CS)
else
CFLAGS += -DKWRF_CS=GPIO\(0,0\) # set default
CFLAGS += -DKWRF_CS=GPIO_PIN\(0,0\) # set default
endif
ifneq (,$(KWRF_INT))
CFLAGS += -DKWRF_INT=$(KWRF_INT)
else
CFLAGS += -DKWRF_INT=GPIO\(0,1\) # set default
CFLAGS += -DKWRF_INT=GPIO_PIN\(0,1\) # set default
endif
ifneq (,$(KWRF_SPI_SPEED))
CFLAGS += -DKWRF_SPI_SPEED=$(KWRF_SPI_SPEED)

4
tests/driver_l3g4200d/Makefile
View File

@ -22,13 +22,13 @@ ifneq (,$(TEST_L3G4200D_INT))
CFLAGS += -DTEST_L3G4200D_INT=$(TEST_L3G4200D_INT)
else
# set random default
CFLAGS += -DTEST_L3G4200D_INT=GPIO\(0,0\)
CFLAGS += -DTEST_L3G4200D_INT=GPIO_PIN\(0,0\)
endif
ifneq (,$(TEST_L3G4200D_DRDY))
CFLAGS += -DTEST_L3G4200D_DRDY=$(TEST_L3G4200D_DRDY)
else
# set random default
CFLAGS += -DTEST_L3G4200D_DRDY=GPIO\(0,1\)
CFLAGS += -DTEST_L3G4200D_DRDY=GPIO_PIN\(0,1\)
endif
include $(RIOTBASE)/Makefile.include

6
tests/driver_lis3dh/Makefile
View File

@ -16,19 +16,19 @@ ifneq (,$(TEST_LIS3DH_CS))
CFLAGS += -DTEST_LIS3DH_CS=$(TEST_LIS3DH_CS)
else
# set arbitrary default
CFLAGS += -DTEST_LIS3DH_CS=GPIO\(0,0\)
CFLAGS += -DTEST_LIS3DH_CS=GPIO_PIN\(0,0\)
endif
ifneq (,$(TEST_LIS3DH_INT1))
CFLAGS += -DTEST_LIS3DH_INT1=$(TEST_LIS3DH_INT1)
else
# set arbitrary default
CFLAGS += -DTEST_LIS3DH_INT1=GPIO\(0,1\)
CFLAGS += -DTEST_LIS3DH_INT1=GPIO_PIN\(0,1\)
endif
ifneq (,$(TEST_LIS3DH_INT2))
CFLAGS += -DTEST_LIS3DH_INT2=$(TEST_LIS3DH_INT2)
else
# set arbitrary default
CFLAGS += -DTEST_LIS3DH_INT2=GPIO\(0,2\)
CFLAGS += -DTEST_LIS3DH_INT2=GPIO_PIN\(0,2\)
endif
include $(RIOTBASE)/Makefile.include

4
tests/driver_lsm303dlhc/Makefile
View File

@ -35,13 +35,13 @@ ifneq (,$(TEST_LSM303DLHC_ACC_PIN))
CFLAGS += -DTEST_LSM303DLHC_ACC_PIN=$(TEST_LSM303DLHC_ACC_PIN)
else
# set random default
CFLAGS += -DTEST_LSM303DLHC_ACC_PIN=GPIO\(0,0\)
CFLAGS += -DTEST_LSM303DLHC_ACC_PIN=GPIO_PIN\(0,0\)
endif
ifneq (,$(TEST_LSM303DLHC_MAG_PIN))
CFLAGS += -DTEST_LSM303DLHC_MAG_PIN=$(TEST_LSM303DLHC_MAG_PIN)
else
# set random default
CFLAGS += -DTEST_LSM303DLHC_MAG_PIN=GPIO\(0,1\)
CFLAGS += -DTEST_LSM303DLHC_MAG_PIN=GPIO_PIN\(0,1\)
endif
include $(RIOTBASE)/Makefile.include

6
tests/driver_nrf24l01p_lowlevel/Makefile
View File

@ -10,9 +10,9 @@ USEMODULE += nrf24l01p
FEATURES_REQUIRED = periph_spi
SPI_PORT ?= SPI_0
CE_PIN ?= GPIO\(0,0\)
CS_PIN ?= GPIO\(0,1\)
IRQ_PIN ?= GPIO\(0,2\)
CE_PIN ?= GPIO_PIN\(0,0\)
CS_PIN ?= GPIO_PIN\(0,1\)
IRQ_PIN ?= GPIO_PIN\(0,2\)
include $(RIOTBASE)/Makefile.include

2
tests/driver_nvram_spi/Makefile
View File

@ -16,7 +16,7 @@ ifneq (,$(TEST_NVRAM_SPI_CS))
CFLAGS += -DTEST_NVRAM_SPI_CS=$(TEST_NVRAM_SPI_CS)
else
# set arbitrary default
CFLAGS += -DTEST_NVRAM_SPI_CS=GPIO\(0,0\)
CFLAGS += -DTEST_NVRAM_SPI_CS=GPIO_PIN\(0,0\)
endif
ifneq (,$(TEST_NVRAM_SPI_SIZE))
CFLAGS += -DTEST_NVRAM_SPI_SIZE=$(TEST_NVRAM_SPI_SIZE)

6
tests/driver_pcd8544/Makefile
View File

@ -10,13 +10,13 @@ ifeq (,$(TEST_PCD8544_SPI))
CFLAGS += -DTEST_PCD8544_SPI=SPI_0
endif
ifeq (,$(TEST_PCD8544_CS))
CFLAGS += -DTEST_PCD8544_CS=GPIO\(0,0\)
CFLAGS += -DTEST_PCD8544_CS=GPIO_PIN\(0,0\)
endif
ifeq (,$(TEST_PCD8544_RESET))
CFLAGS += -DTEST_PCD8544_RESET=GPIO\(0,1\)
CFLAGS += -DTEST_PCD8544_RESET=GPIO_PIN\(0,1\)
endif
ifeq (,$(TEST_PCD8544_MODE))
CFLAGS += -DTEST_PCD8544_MODE=GPIO\(0,2\)
CFLAGS += -DTEST_PCD8544_MODE=GPIO_PIN\(0,2\)
endif
include $(RIOTBASE)/Makefile.include

6
tests/driver_pir/Makefile
View File

@ -5,10 +5,10 @@ FEATURES_REQUIRED = periph_gpio
# Define default pin mappings for some boards:
ifneq (,$(filter stm32f4discovery,$(BOARD)))
export PIR_GPIO ?= GPIO\(3,7\)
export PIR_GPIO ?= GPIO_PIN\(3,7\)
endif
ifneq (,$(filter arduino-due,$(BOARD)))
export PIR_GPIO ?= GPIO\(0,20\)
export PIR_GPIO ?= GPIO_PIN\(0,20\)
endif
USEMODULE += pir
@ -18,7 +18,7 @@ ifneq (,$(PIR_GPIO))
CFLAGS += -DPIR_GPIO=$(PIR_GPIO)
else
# set random default
CFLAGS += -DPIR_GPIO=GPIO\(0,0\)
CFLAGS += -DPIR_GPIO=GPIO_PIN\(0,0\)
endif
include $(RIOTBASE)/Makefile.include

14
tests/periph_gpio/main.c
View File

@ -66,7 +66,7 @@ static int init_out(int argc, char **argv)
else {
pull = GPIO_NOPULL;
}
if (gpio_init(GPIO(port, pin), GPIO_DIR_OUT, pull) < 0) {
if (gpio_init(GPIO_PIN(port, pin), GPIO_DIR_OUT, pull) < 0) {
printf("Error while initializing PORT_%i.%i as output\n", port, pin);
return 1;
}
@ -97,7 +97,7 @@ static int init_in(int argc, char **argv)
else {
pull = GPIO_NOPULL;
}
if (gpio_init(GPIO(port, pin), GPIO_DIR_IN, pull) < 0) {
if (gpio_init(GPIO_PIN(port, pin), GPIO_DIR_IN, pull) < 0) {
printf("Error while initializing PORT_%i.%02i as input\n", port, pin);
return 1;
}
@ -146,7 +146,7 @@ static int init_int(int argc, char **argv)
else {
pull = GPIO_NOPULL;
}
if (gpio_init_int(GPIO(port, pin), pull, flank, cb, (void *)pin) < 0) {
if (gpio_init_int(GPIO_PIN(port, pin), pull, flank, cb, (void *)pin) < 0) {
printf("Error while initializing PORT_%i.%02i as external interrupt\n",
port, pin);
return 1;
@ -167,7 +167,7 @@ static int read(int argc, char **argv)
}
port = atoi(argv[1]);
pin = atoi(argv[2]);
if (gpio_read(GPIO(port, pin))) {
if (gpio_read(GPIO_PIN(port, pin))) {
printf("PORT_%i.%02i is HIGH\n", port, pin);
}
else {
@ -187,7 +187,7 @@ static int set(int argc, char **argv)
port = atoi(argv[1]);
pin = atoi(argv[2]);
gpio_set(GPIO(port, pin));
gpio_set(GPIO_PIN(port, pin));
return 0;
}
@ -201,7 +201,7 @@ static int clear(int argc, char **argv)
}
port = atoi(argv[1]);
pin = atoi(argv[2]);
gpio_clear(GPIO(port, pin));
gpio_clear(GPIO_PIN(port, pin));
return 0;
}
@ -215,7 +215,7 @@ static int toggle(int argc, char **argv)
}
port = atoi(argv[1]);
pin = atoi(argv[2]);
gpio_toggle(GPIO(port, pin));
gpio_toggle(GPIO_PIN(port, pin));
return 0;
}

2
tests/periph_spi/main.c
View File

@ -87,7 +87,7 @@ int parse_spi_dev(int argc, char **argv)
}
port = atoi(argv[2]);
pin = atoi(argv[3]);
spi_cs = GPIO(port,pin);
spi_cs = GPIO_PIN(port,pin);
if (argc >= 5) {
spi_mode = argv[4][0] - '0';
if (spi_mode < 0 || spi_mode > 3) {