diff --git a/cpu/atmega_common/periph/uart.c b/cpu/atmega_common/periph/uart.c index 2d3bd52d00..4449ab2bf6 100644 --- a/cpu/atmega_common/periph/uart.c +++ b/cpu/atmega_common/periph/uart.c @@ -114,7 +114,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* make sure the given device is valid */ if (uart >= UART_NUMOF) { - return -1; + return UART_NODEV; } /* register interrupt context */ @@ -132,7 +132,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* enable RX and TX and the RX interrupt */ dev[uart]->CSRB = ((1 << RXCIE0) | (1 << RXEN0) | (1 << TXEN0)); - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/cc2538/periph/uart.c b/cpu/cc2538/periph/uart.c index ac8a99db84..4c1a0b7bf4 100644 --- a/cpu/cc2538/periph/uart.c +++ b/cpu/cc2538/periph/uart.c @@ -160,8 +160,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* initialize basic functionality */ int res = init_base(uart, baudrate); - - if (res != 0) { + if (res != UART_OK) { return res; } @@ -183,9 +182,11 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) NVIC_EnableIRQ(UART1_IRQn); break; #endif + default: + return UART_NODEV; } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -240,7 +241,7 @@ static int init_base(uart_t uart, uint32_t baudrate) default: (void)u; - return -1; + return UART_NODEV; } #if UART_0_EN || UART_1_EN @@ -313,7 +314,7 @@ static int init_base(uart_t uart, uint32_t baudrate) /* UART Enable */ u->cc2538_uart_ctl.CTLbits.UARTEN = 1; - return 0; + return UART_OK; #endif /* UART_0_EN || UART_1_EN */ } diff --git a/cpu/cc26x0/periph/uart.c b/cpu/cc26x0/periph/uart.c index dd4607497d..de67b49514 100644 --- a/cpu/cc26x0/periph/uart.c +++ b/cpu/cc26x0/periph/uart.c @@ -49,7 +49,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* make sure the uart device is valid */ if (uart != 0) { - return -1; + return UART_NODEV; } /* enable clocks: serial power domain and UART */ @@ -89,7 +89,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* start the UART */ UART->CTL = ENABLE_MASK; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/ezr32wg/periph/uart.c b/cpu/ezr32wg/periph/uart.c index 1fea3e37a0..3179c6ba79 100644 --- a/cpu/ezr32wg/periph/uart.c +++ b/cpu/ezr32wg/periph/uart.c @@ -48,7 +48,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* check if device is valid and get base register address */ if (dev >= UART_NUMOF) { - return -1; + return UART_NODEV; } uart = _uart(dev); @@ -77,7 +77,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) uart->IEN |= USART_IEN_RXDATAV; /* enable receiver and transmitter */ uart->CMD = USART_CMD_TXEN | USART_CMD_RXEN; - return 0; + return UART_OK; } void uart_write(uart_t dev, const uint8_t *data, size_t len) diff --git a/cpu/kinetis_common/periph/uart.c b/cpu/kinetis_common/periph/uart.c index 700fdc72db..83c2bb0c2e 100644 --- a/cpu/kinetis_common/periph/uart.c +++ b/cpu/kinetis_common/periph/uart.c @@ -59,8 +59,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* do basic initialization */ int res = init_base(uart, baudrate); - - if (res < 0) { + if (res != UART_OK) { return res; } @@ -88,11 +87,10 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) #endif default: - return -2; - break; + return UART_NODEV; } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -134,7 +132,7 @@ static int init_base(uart_t uart, uint32_t baudrate) #endif default: - return -1; + return UART_NODEV; } /* configure RX and TX pins, set pin to use alternative function mode */ @@ -179,7 +177,7 @@ static int init_base(uart_t uart, uint32_t baudrate) /* enable transmitter and receiver */ dev->C2 |= UART_C2_TE_MASK | UART_C2_RE_MASK; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/lm4f120/periph/uart.c b/cpu/lm4f120/periph/uart.c index 67c6e4e13e..bcf3061377 100644 --- a/cpu/lm4f120/periph/uart.c +++ b/cpu/lm4f120/periph/uart.c @@ -43,11 +43,11 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) assert(uart == 0); /* Check to make sure the UART peripheral is present */ if(!ROM_SysCtlPeripheralPresent(SYSCTL_PERIPH_UART0)){ - return -1; + return UART_NODEV; } int res = init_base(uart, baudrate); - if(res < 0){ + if(res != UART_OK){ return res; } @@ -76,7 +76,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) break; #endif } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -99,8 +99,10 @@ static int init_base(uart_t uart, uint32_t baudrate) ROM_UARTEnable(UART0_BASE); break; #endif + default: + return UART_NODEV; } - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/lpc11u34/periph/uart.c b/cpu/lpc11u34/periph/uart.c index 39ef755e95..1859783ae5 100644 --- a/cpu/lpc11u34/periph/uart.c +++ b/cpu/lpc11u34/periph/uart.c @@ -35,7 +35,7 @@ static int init_base(uart_t uart, uint32_t baudrate); int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { int res = init_base(uart, baudrate); - if (res < 0) { + if (res != UART_OK) { return res; } @@ -55,7 +55,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) #endif } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -65,7 +65,7 @@ static int init_base(uart_t uart, uint32_t baudrate) case UART_0: /* this implementation only supports 115200 baud */ if (baudrate != 115200) { - return -2; + return UART_NOBAUD; } /* select and configure the pin for RX */ @@ -91,10 +91,10 @@ static int init_base(uart_t uart, uint32_t baudrate) break; #endif default: - return -1; + return UART_NODEV; } - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/lpc1768/periph/uart.c b/cpu/lpc1768/periph/uart.c index 304717792e..7b8fa676d7 100644 --- a/cpu/lpc1768/periph/uart.c +++ b/cpu/lpc1768/periph/uart.c @@ -35,7 +35,7 @@ static int init_base(uart_t uart, uint32_t baudrate); int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { int res = init_base(uart, baudrate); - if (res < 0) { + if (res != UART_OK) { return res; } @@ -64,7 +64,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) #endif } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -74,7 +74,7 @@ static int init_base(uart_t uart, uint32_t baudrate) case UART_0: /* this implementation only supports 115200 baud */ if (baudrate != 115200) { - return -2; + return UART_NOBAUD; } /* power on UART device and select peripheral clock */ @@ -105,7 +105,7 @@ static int init_base(uart_t uart, uint32_t baudrate) case UART_1: /* this implementation only supports 115200 baud */ if (baudrate != 115200) { - return -2; + return UART_NOBAUD; } /* power on UART device and select peripheral clock */ @@ -133,10 +133,10 @@ static int init_base(uart_t uart, uint32_t baudrate) break; #endif default: - return -1; + return UART_NODEV; } - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/lpc2387/periph/uart.c b/cpu/lpc2387/periph/uart.c index be5926cb38..feb801feca 100644 --- a/cpu/lpc2387/periph/uart.c +++ b/cpu/lpc2387/periph/uart.c @@ -39,7 +39,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) (void) baudrate; /* for now, we only support one UART device and only the RX interrupt */ if (dev != 0) { - return -1; + return UART_NODEV; } /* save interrupt context */ @@ -66,7 +66,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* install and enable the IRQ handler */ install_irq(UART0_INT, UART0_IRQHandler, 6); U0IER |= BIT0; /* enable only RX irq */ - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/msp430fxyz/periph/uart.c b/cpu/msp430fxyz/periph/uart.c index 58e0e3e10e..22a37b1bbe 100644 --- a/cpu/msp430fxyz/periph/uart.c +++ b/cpu/msp430fxyz/periph/uart.c @@ -38,8 +38,9 @@ static int init_base(uart_t uart, uint32_t baudrate); int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { - if (init_base(uart, baudrate) < 0) { - return -1; + int res = init_base(uart, baudrate); + if (res != UART_OK) { + return res; } /* save interrupt context */ @@ -50,13 +51,13 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) UART_IF &= ~(UART_IE_RX_BIT); UART_IF |= (UART_IE_TX_BIT); UART_IE |= (UART_IE_RX_BIT); - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) { if (uart != 0) { - return -1; + return UART_NODEV; } /* get the default UART for now -> TODO: enable for multiple devices */ @@ -85,7 +86,7 @@ static int init_base(uart_t uart, uint32_t baudrate) uart_poweron(uart); /* and finally release the software reset bit */ dev->CTL &= ~(USART_CTL_SWRST); - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/native/periph/uart.c b/cpu/native/periph/uart.c index 04ce96cefe..926ccb930b 100644 --- a/cpu/native/periph/uart.c +++ b/cpu/native/periph/uart.c @@ -98,7 +98,7 @@ static void io_signal_handler(int fd, void *arg) int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { if (uart >= UART_NUMOF) { - return -1; + return UART_NODEV; } struct termios termios; @@ -133,7 +133,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) case 115200: speed = B115200; break; case 230400: speed = B230400 ; break; default: - return -1; + return UART_NOBAUD; break; } @@ -143,7 +143,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) tty_fds[uart] = real_open(tty_device_filenames[uart], O_RDWR | O_NONBLOCK); if (tty_fds[uart] < 0) { - return -3; + return UART_INTERR; } tcsetattr(tty_fds[uart], TCSANOW, &termios); @@ -154,7 +154,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) native_async_read_setup(); native_async_read_add_handler(tty_fds[uart], NULL, io_signal_handler); - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/nrf5x_common/periph/uart.c b/cpu/nrf5x_common/periph/uart.c index 067c7a6f27..fa6b6f5582 100644 --- a/cpu/nrf5x_common/periph/uart.c +++ b/cpu/nrf5x_common/periph/uart.c @@ -41,7 +41,7 @@ static uart_isr_ctx_t uart_config; int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { if (uart != 0) { - return -1; + return UART_NODEV; } /* remember callback addresses and argument */ @@ -122,7 +122,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud921600; break; default: - return -2; + return UART_NOBAUD; } /* enable the UART device */ @@ -133,7 +133,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* enable global and receiving interrupt */ NVIC_EnableIRQ(UART_IRQN); NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Msk; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/sam3/periph/uart.c b/cpu/sam3/periph/uart.c index 6548071bff..6aff70af33 100644 --- a/cpu/sam3/periph/uart.c +++ b/cpu/sam3/periph/uart.c @@ -38,7 +38,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* make sure given device is valid */ if (uart >= UART_NUMOF) { - return -1; + return UART_NODEV; } /* get base register */ @@ -71,7 +71,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) NVIC_EnableIRQ(uart_config[uart].irqn); dev->UART_IER = UART_IER_RXRDY; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/samd21/periph/uart.c b/cpu/samd21/periph/uart.c index 966c9876d4..556f1dc582 100644 --- a/cpu/samd21/periph/uart.c +++ b/cpu/samd21/periph/uart.c @@ -50,7 +50,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* initialize basic functionality */ int res = init_base(uart, baudrate); - if (res != 0) { + if (res != UART_OK) { return res; } @@ -60,7 +60,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* configure interrupts and enable RX interrupt */ _uart(uart)->INTENSET.reg = SERCOM_USART_INTENSET_RXC; NVIC_EnableIRQ(SERCOM0_IRQn + _sercom_id(_uart(uart))); - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -69,7 +69,7 @@ static int init_base(uart_t uart, uint32_t baudrate) SercomUsart *dev; if ((unsigned int)uart >= UART_NUMOF) { - return -1; + return UART_NODEV; } /* get the devices base register */ @@ -101,7 +101,7 @@ static int init_base(uart_t uart, uint32_t baudrate) while (dev->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_CTRLB) {} /* finally, enable the device */ dev->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/saml21/periph/uart.c b/cpu/saml21/periph/uart.c index bf0a05e311..34c9f7d88b 100644 --- a/cpu/saml21/periph/uart.c +++ b/cpu/saml21/periph/uart.c @@ -39,8 +39,8 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* initialize basic functionality */ int res = init_base(uart, baudrate); - if (res != 0) { - return res; + if (res != UART_OK) { + return UART_NODEV; } /* register callbacks */ @@ -55,7 +55,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) UART_0_DEV.INTENSET.bit.RXC = 1; break; } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -113,11 +113,11 @@ static int init_base(uart_t uart, uint32_t baudrate) #endif default: (void)baud_calculated; - return -1; + return UART_NODEV; } uart_poweron(uart); - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/stm32f0/periph/uart.c b/cpu/stm32f0/periph/uart.c index 20365cd6b7..76af555b0b 100644 --- a/cpu/stm32f0/periph/uart.c +++ b/cpu/stm32f0/periph/uart.c @@ -45,7 +45,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* initialize UART in blocking mode first */ res = init_base(uart, baudrate); - if (res < 0) { + if (res != UART_OK) { return res; } @@ -69,7 +69,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) uart_config[uart].rx_cb = rx_cb; uart_config[uart].arg = arg; - return 0; + return UART_OK; } int init_base(uart_t uart, uint32_t baudrate) @@ -110,7 +110,7 @@ int init_base(uart_t uart, uint32_t baudrate) break; #endif default: - return -1; + return UART_NODEV; } /* Make sure port and dev are != NULL here, i.e. that the variables are @@ -149,7 +149,7 @@ int init_base(uart_t uart, uint32_t baudrate) /* enable receive and transmit mode */ dev->CR1 |= USART_CR1_UE | USART_CR1_TE | USART_CR1_RE; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/stm32f1/periph/uart.c b/cpu/stm32f1/periph/uart.c index 0e3cd765f9..c46a867fff 100644 --- a/cpu/stm32f1/periph/uart.c +++ b/cpu/stm32f1/periph/uart.c @@ -58,7 +58,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* make sure the given device is valid */ if (uart >= UART_NUMOF) { - return -1; + return UART_NODEV; } /* save ISR context */ @@ -89,7 +89,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) dev(uart)->CR1 = (USART_CR1_UE | USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE); - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/stm32f2/periph/uart.c b/cpu/stm32f2/periph/uart.c index 593df0a204..148e86b13c 100644 --- a/cpu/stm32f2/periph/uart.c +++ b/cpu/stm32f2/periph/uart.c @@ -75,7 +75,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* check if given UART device does exist */ if (uart < 0 || uart >= UART_NUMOF) { - return -1; + return UART_NODEV; } /* check if baudrate is reachable and choose the right oversampling method*/ @@ -88,7 +88,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) over8 = 1; } else { - return -2; + return UART_NOBAUD; } /* get UART base address */ @@ -147,7 +147,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) NVIC_EnableIRQ(uart_config[uart].irqn); dma_isr_enable(uart_config[uart].dma_stream); dev->CR1 |= USART_CR1_RXNEIE; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/stm32f3/periph/uart.c b/cpu/stm32f3/periph/uart.c index d8f8473d18..e7ea3cadbb 100644 --- a/cpu/stm32f3/periph/uart.c +++ b/cpu/stm32f3/periph/uart.c @@ -34,7 +34,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* do basic initialization */ int res = init_base(uart, baudrate); - if (res < 0) { + if (res != UART_OK) { return res; } @@ -64,7 +64,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) #endif } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -116,7 +116,7 @@ static int init_base(uart_t uart, uint32_t baudrate) break; #endif default: - return -1; + return UART_NODEV; } /* Make sure port and dev are != NULL here, i.e. that the variables are @@ -157,7 +157,7 @@ static int init_base(uart_t uart, uint32_t baudrate) dev->CR2 = 0; dev->CR1 |= USART_CR1_UE | USART_CR1_TE | USART_CR1_RE; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/stm32f4/periph/uart.c b/cpu/stm32f4/periph/uart.c index 4a22faf476..e287ac585b 100644 --- a/cpu/stm32f4/periph/uart.c +++ b/cpu/stm32f4/periph/uart.c @@ -55,7 +55,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) /* check if given UART device does exist */ if ((unsigned int)uart >= UART_NUMOF) { - return -1; + return UART_NODEV; } /* get UART base address */ @@ -104,7 +104,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) NVIC_EnableIRQ(uart_config[uart].irqn); dma_isr_enable(uart_config[uart].dma_stream); dev->CR1 |= USART_CR1_RXNEIE; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len) diff --git a/cpu/stm32l1/periph/uart.c b/cpu/stm32l1/periph/uart.c index ef037fcee8..81c978305e 100644 --- a/cpu/stm32l1/periph/uart.c +++ b/cpu/stm32l1/periph/uart.c @@ -35,7 +35,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) { /* do basic initialization */ int res = init_base(uart, baudrate); - if (res < 0) { + if (res != UART_OK) { return res; } @@ -65,7 +65,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg) #endif } - return 0; + return UART_OK; } static int init_base(uart_t uart, uint32_t baudrate) @@ -110,7 +110,7 @@ static int init_base(uart_t uart, uint32_t baudrate) break; #endif default: - return -1; + return UART_NODEV; } /* Make sure dev is != NULL here, i.e. that the variable is assigned in @@ -134,7 +134,7 @@ static int init_base(uart_t uart, uint32_t baudrate) dev->CR2 = 0; dev->CR1 |= USART_CR1_UE | USART_CR1_TE | USART_CR1_RE; - return 0; + return UART_OK; } void uart_write(uart_t uart, const uint8_t *data, size_t len)