[cc110x_ng]

* fuxed transceiver driver for chronos
* some more stuff
This commit is contained in:
Oliver Hahm 2010-12-10 18:00:31 +01:00
parent cf3b704bc5
commit 31f6c17606
2 changed files with 20 additions and 18 deletions

View File

@ -8,9 +8,9 @@
#include <cc430_.h> #include <cc430_.h>
#include <msp430/rf1a.h> #include <msp430/rf1a.h>
#define CC1100_GDO0 IOCFG0 #define CC1100_GDO0 (RF1AIN & BIT0)
#define CC1100_GDO1 IOCFG1 #define CC1100_GDO1 (RF1AIN & BIT1)
#define CC1100_GDO2 IOCFG2 #define CC1100_GDO2 (RF1AIN & BIT2)
int cc1100_get_gdo0(void) { int cc1100_get_gdo0(void) {
return CC1100_GDO0; return CC1100_GDO0;
@ -37,41 +37,44 @@ void cc1100_after_send(void)
} }
void cc1100_gdo0_enable(void) { void cc1100_gdo0_enable(void) {
RF1AIFG &= ~RF1AIV_RFIFG0; RF1AIFG &= ~BIT0;
RF1AIE |= RF1AIV_RFIFG0; RF1AIE |= BIT0;
} }
void cc1100_gdo0_disable(void) { void cc1100_gdo0_disable(void) {
RF1AIE &= ~RF1AIV_RFIFG0; RF1AIE &= ~BIT0;
RF1AIFG &= ~RF1AIV_RFIFG0; RF1AIFG &= ~BIT0;
} }
void cc1100_gdo2_disable(void) { void cc1100_gdo2_disable(void) {
RF1AIFG &= ~RF1AIV_RFIFG2; RF1AIFG &= ~BIT2; // Clear a pending interrupt
RF1AIE &= ~RF1AIV_RFIFG2; RF1AIE &= ~BIT2; // Disable the interrupt
} }
void cc1100_gdo2_enable(void) { void cc1100_gdo2_enable(void) {
RF1AIE &= ~RF1AIV_RFIFG2; RF1AIFG &= ~BIT2; // Clear a pending interrupt
RF1AIFG |= RF1AIV_RFIFG2; RF1AIE |= BIT2; // Enable the interrupt
} }
void cc1100_init_interrupts(void) { void cc1100_init_interrupts(void) {
uint8_t state = disableIRQ(); /* Disable all interrupts */ uint8_t state = disableIRQ(); /* Disable all interrupts */
cc1100_gdo2_enable();
cc1100_gdo0_disable();
restoreIRQ(state); /* Enable all interrupts */ restoreIRQ(state); /* Enable all interrupts */
} }
interrupt (CC1101_VECTOR) __attribute__ ((naked)) cc1100_isr(void){ interrupt (CC1101_VECTOR) __attribute__ ((naked)) cc1100_isr(void){
__enter_isr(); __enter_isr();
/* Check IFG */ /* Check IFG */
if (RF1AIFG & RF1AIV_RFIFG2) { if (RF1AIV == RF1AIV_RFIFG2) {
RF1AIFG &= ~RF1AIV_RFIFG2; while (RF1AIN & BIT2);
/* discard all further interrupts */
RF1AIV = 0;
cc1100_gdo2_irq(); cc1100_gdo2_irq();
} }
if (RF1AIFG & RF1AIV_RFIFG0) { if (RF1AIV == RF1AIV_RFIFG0) {
RF1AIFG &= ~RF1AIV_RFIFG0;
RF1AIE &= ~RF1AIV_RFIFG0;
cc1100_gdo0_irq(); cc1100_gdo0_irq();
RF1AIE &= ~BIT0;
} }
__exit_isr(); __exit_isr();
} }

View File

@ -128,8 +128,7 @@ void cc1100_spi_init(void)
} }
} }
uint8_t uint8_t cc1100_txrx(uint8_t c) {
cc1100_txrx(uint8_t c) {
uint8_t result; uint8_t result;
SSP0DR = c; SSP0DR = c;
#ifdef DEBUG #ifdef DEBUG