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Merge pull request #10660 from aabadie/pr/periph/stm32_lpuart_l496zg

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boards/nucleo-l496zg: use lpuart1 as stdio interface
This commit is contained in:
Martine Lenders 2018-12-27 19:32:17 +01:00 committed by GitHub
commit 380d19e9d2
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5 changed files with 26 additions and 4 deletions
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2
boards/nucleo-l496zg/Makefile.dep
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@ -1 +1,3 @@
FEATURES_REQUIRED += periph_lpuart
include $(RIOTBOARD)/common/nucleo/Makefile.dep include $(RIOTBOARD)/common/nucleo/Makefile.dep

2
boards/nucleo-l496zg/Makefile.features
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@ -4,7 +4,7 @@ FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart FEATURES_PROVIDED += periph_uart periph_lpuart
# load the common Makefile.features for Nucleo boards # load the common Makefile.features for Nucleo boards
include $(RIOTBOARD)/common/nucleo144/Makefile.features include $(RIOTBOARD)/common/nucleo144/Makefile.features

2
boards/nucleo-l496zg/Makefile.include
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@ -4,7 +4,7 @@ export CPU_MODEL = stm32l496zg
# stdio is not available over st-link but on the Arduino TX/RX pins # stdio is not available over st-link but on the Arduino TX/RX pins
# A serial to USB converter plugged to the host is required # A serial to USB converter plugged to the host is required
PORT_LINUX ?= /dev/ttyUSB0 PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*))) PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
# load the common Makefile.include for Nucleo boards # load the common Makefile.include for Nucleo boards

17
boards/nucleo-l496zg/include/periph_conf.h
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@ -112,6 +112,18 @@ static const timer_conf_t timer_config[] = {
* @{ * @{
*/ */
static const uart_conf_t uart_config[] = { static const uart_conf_t uart_config[] = {
{
.dev = LPUART1,
.rcc_mask = RCC_APB1ENR2_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_G, 8),
.tx_pin = GPIO_PIN(PORT_G, 7),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB12,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
},
{ {
.dev = USART3, .dev = USART3,
.rcc_mask = RCC_APB1ENR1_USART3EN, .rcc_mask = RCC_APB1ENR1_USART3EN,
@ -130,8 +142,9 @@ static const uart_conf_t uart_config[] = {
} }
}; };
#define UART_0_ISR (isr_usart3) #define UART_0_ISR (isr_lpuart1)
#define UART_0_DMA_ISR (isr_dma1_stream5) #define UART_1_ISR (isr_usart3)
#define UART_1_DMA_ISR (isr_dma1_stream5)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */ /** @} */

7
cpu/stm32_common/periph/gpio.c
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@ -85,6 +85,13 @@ int gpio_init(gpio_t pin, gpio_mode_t mode)
periph_clk_en(IOP, (RCC_IOPENR_GPIOAEN << _port_num(pin))); periph_clk_en(IOP, (RCC_IOPENR_GPIOAEN << _port_num(pin)));
#elif defined (CPU_FAM_STM32L4) #elif defined (CPU_FAM_STM32L4)
periph_clk_en(AHB2, (RCC_AHB2ENR_GPIOAEN << _port_num(pin))); periph_clk_en(AHB2, (RCC_AHB2ENR_GPIOAEN << _port_num(pin)));
#ifdef PWR_CR2_IOSV
if (port == GPIOG) {
/* Port G requires external power supply */
periph_clk_en(APB1, RCC_APB1ENR1_PWREN);
PWR->CR2 |= PWR_CR2_IOSV;
}
#endif /* PWR_CR2_IOSV */
#else #else
periph_clk_en(AHB1, (RCC_AHB1ENR_GPIOAEN << _port_num(pin))); periph_clk_en(AHB1, (RCC_AHB1ENR_GPIOAEN << _port_num(pin)));
#endif #endif