boards/*: instead of cpp-style, use C-style comments
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@ -117,8 +117,8 @@ void msp430_init_dco(void)
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/* Stop watchdog */
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/* Stop watchdog */
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WDTCTL = WDTPW + WDTHOLD;
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WDTCTL = WDTPW + WDTHOLD;
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//Init crystal for mclk
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/* Init crystal for mclk */
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//XT2 = HF XTAL
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/* XT2 = HF XTAL */
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BCSCTL1 = RSEL2;
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BCSCTL1 = RSEL2;
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/* Wait for xtal to stabilize */
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/* Wait for xtal to stabilize */
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@ -44,10 +44,10 @@ init_mam(void)
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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void init_clks2(void)
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void init_clks2(void)
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{
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{
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// Wait for the PLL to lock to set frequency
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/* Wait for the PLL to lock to set frequency */
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while (!(PLLSTAT & BIT26));
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while (!(PLLSTAT & BIT26));
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// Connect the PLL as the clock source
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/* Connect the PLL as the clock source */
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PLLCON = 0x0003;
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PLLCON = 0x0003;
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pllfeed();
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pllfeed();
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@ -57,8 +57,8 @@ void init_clks2(void)
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void watchdog_init(void)
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void watchdog_init(void)
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{
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{
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WDCLKSEL = 0; // clock source: RC oscillator
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WDCLKSEL = 0; /* clock source: RC oscillator */
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WDMOD &= ~WDTOF; // clear time-out flag
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WDMOD &= ~WDTOF; /* clear time-out flag */
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WDTC = (F_RC_OSCILLATOR / 4) * WD_INTERVAL;
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WDTC = (F_RC_OSCILLATOR / 4) * WD_INTERVAL;
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}
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}
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@ -66,7 +66,7 @@ void watchdog_init(void)
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void bl_init_clks(void)
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void bl_init_clks(void)
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{
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{
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watchdog_init();
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watchdog_init();
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PCONP = PCRTC; // switch off everything except RTC
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PCONP = PCRTC; /* switch off everything except RTC */
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init_clks1();
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init_clks1();
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init_clks2();
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init_clks2();
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init_mam();
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init_mam();
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@ -32,7 +32,7 @@ void bl_init_ports(void)
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gpio_init_ports();
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gpio_init_ports();
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/* UART0 */
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/* UART0 */
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PINSEL0 |= BIT4 + BIT6; // RxD0 and TxD0
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PINSEL0 |= BIT4 + BIT6; /* RxD0 and TxD0 */
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PINSEL0 &= ~(BIT5 + BIT7);
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PINSEL0 &= ~(BIT5 + BIT7);
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/* LEDS */
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/* LEDS */
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@ -45,31 +45,31 @@ void bl_init_ports(void)
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void init_clks1(void)
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void init_clks1(void)
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{
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{
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// Disconnect PLL
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/* Disconnect PLL */
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PLLCON &= ~0x0002;
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PLLCON &= ~0x0002;
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pllfeed();
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pllfeed();
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// Disable PLL
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/* Disable PLL */
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PLLCON &= ~0x0001;
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PLLCON &= ~0x0001;
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pllfeed();
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pllfeed();
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SCS |= 0x20; // Enable main OSC
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SCS |= 0x20; /* Enable main OSC */
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while (!(SCS & 0x40)); // Wait until main OSC is usable
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while (!(SCS & 0x40)); /* Wait until main OSC is usable */
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/* select main OSC, 16MHz, as the PLL clock source */
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/* select main OSC, 16MHz, as the PLL clock source */
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CLKSRCSEL = 0x0001;
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CLKSRCSEL = 0x0001;
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// Setting Multiplier and Divider values
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/* Setting Multiplier and Divider values */
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PLLCFG = 0x0008; // M=9 N=1 Fcco = 288 MHz
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PLLCFG = 0x0008; /* M=9 N=1 Fcco = 288 MHz */
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pllfeed();
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pllfeed();
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// Enabling the PLL */
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/* Enabling the PLL */
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PLLCON = 0x0001;
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PLLCON = 0x0001;
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pllfeed();
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pllfeed();
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/* Set clock divider to 4 (value+1) */
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/* Set clock divider to 4 (value+1) */
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CCLKCFG = CL_CPU_DIV - 1; // Fcpu = 72 MHz
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CCLKCFG = CL_CPU_DIV - 1; /* Fcpu = 72 MHz */
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#if USE_USB
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#if USE_USB
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USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
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USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
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