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cpu/kinetis: fix typos

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This commit is contained in:
Kaspar Schleiser 2019-10-23 21:13:53 +02:00
parent a8c3c6ab68
commit 3eea508695
2 changed files with 2 additions and 2 deletions
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2
cpu/kinetis/doc.txt
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@ -114,7 +114,7 @@ RTC is clocked by a 32.768 kHz clock.
Please note the manual of your MCU or SiP for the clock setting for the RTC Please note the manual of your MCU or SiP for the clock setting for the RTC
module. After initialization Time Seconds Register (TSR) increments once a module. After initialization Time Seconds Register (TSR) increments once a
second. The TSR (also TAR) value will be converted to the stuct tm and back second. The TSR (also TAR) value will be converted to the struct tm and back
with the help of stdlib functions that are defined in time.h. The driver with the help of stdlib functions that are defined in time.h. The driver
supports alarm, it is stored in the Time Alarm Registers (TAR) and the unit is supports alarm, it is stored in the Time Alarm Registers (TAR) and the unit is
seconds. seconds.

2
cpu/kinetis/periph/ics.c
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@ -50,7 +50,7 @@
** - rev. 1.0 (2013-07-30) ** - rev. 1.0 (2013-07-30)
** Initial version. ** Initial version.
** - rev. 1.1 (2013-10-29) ** - rev. 1.1 (2013-10-29)
** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled. ** Definition of BITBAND macros updated to support peripherals with 32-bit access disabled.
** - rev. 1.2 (2014-01-10) ** - rev. 1.2 (2014-01-10)
** CAN - Corrected address of TSIDR1 register. ** CAN - Corrected address of TSIDR1 register.
** CAN - Corrected name of MSCAN_TDLR bit DLC to TDLC. ** CAN - Corrected name of MSCAN_TDLR bit DLC to TDLC.