riot-ci/RIOT
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

cpu/stm32f3: Use {} notation for empty while loops

Browse Source
This commit is contained in:
Joakim Nohlgård 2016-02-11 14:22:30 +01:00
parent 96a7583c2a
commit 3f122fbba2
4 changed files with 16 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
cpu/stm32f3/cpu.c
View File

@ -66,7 +66,7 @@ static void cpu_clock_init(void)
RCC->CR |= RCC_CR_HSEON;
/* wait for HSE to be ready */
while (!(RCC->CR & RCC_CR_HSERDY));
while (!(RCC->CR & RCC_CR_HSERDY)) {}
/* setup the peripheral bus prescalers */
@ -91,7 +91,7 @@ static void cpu_clock_init(void)
/* enable PLL again */
RCC->CR |= RCC_CR_PLLON;
/* wait until PLL is stable */
while(!(RCC->CR & RCC_CR_PLLRDY));
while(!(RCC->CR & RCC_CR_PLLRDY)) {}
/* configure flash latency */
@ -110,5 +110,5 @@ static void cpu_clock_init(void)
RCC->CFGR |= RCC_CFGR_SW_PLL;
/* wait for sysclock to be stable */
while (!(RCC->CFGR & RCC_CFGR_SWS_PLL));
while (!(RCC->CFGR & RCC_CFGR_SWS_PLL)) {}
}

14
cpu/stm32f3/periph/i2c.c
View File

@ -312,7 +312,7 @@ int i2c_read_regs(i2c_t dev, uint8_t address, uint8_t reg, char *data, int lengt
/* wait for ack */
DEBUG("Waiting for ACK\n");
while (!(i2c->ISR & I2C_ISR_TXIS));
while (!(i2c->ISR & I2C_ISR_TXIS)) {}
/* send register number */
DEBUG("ACK received, write reg into DR\n");
@ -391,7 +391,7 @@ int i2c_write_regs(i2c_t dev, uint8_t address, uint8_t reg, char *data, int leng
/* wait for ack */
DEBUG("Waiting for ACK\n");
while (!(i2c->ISR & I2C_ISR_TXIS));
while (!(i2c->ISR & I2C_ISR_TXIS)) {}
/* send register number */
DEBUG("ACK received, write reg into DR\n");
@ -427,14 +427,14 @@ void i2c_poweroff(i2c_t dev)
switch (dev) {
#if I2C_0_EN
case I2C_0:
while (I2C_0_DEV->ISR & I2C_ISR_BUSY);
while (I2C_0_DEV->ISR & I2C_ISR_BUSY) {}
I2C_0_CLKDIS();
break;
#endif
#if I2C_1_EN
case I2C_1:
while (I2C_1_DEV->ISR & I2C_ISR_BUSY);
while (I2C_1_DEV->ISR & I2C_ISR_BUSY) {}
I2C_0_CLKDIS();
break;
@ -472,7 +472,7 @@ static inline void _read(I2C_TypeDef *dev, char *data, int length)
for (int i = 0; i < length; i++) {
/* wait for transfer to finish */
DEBUG("Waiting for DR to be full\n");
while (!(dev->ISR & I2C_ISR_RXNE));
while (!(dev->ISR & I2C_ISR_RXNE)) {}
DEBUG("DR is now full\n");
/* read data from data register */
@ -486,7 +486,7 @@ static inline void _write(I2C_TypeDef *dev, char *data, int length)
for (int i = 0; i < length; i++) {
/* wait for ack */
DEBUG("Waiting for ACK\n");
while (!(dev->ISR & I2C_ISR_TXIS));
while (!(dev->ISR & I2C_ISR_TXIS)) {}
/* write data to data register */
DEBUG("Write byte %i to DR\n", i);
@ -499,7 +499,7 @@ static inline void _stop(I2C_TypeDef *dev)
{
/* make sure transfer is complete */
DEBUG("Wait for transfer to be complete\n");
while (!(dev->ISR & I2C_ISR_TC));
while (!(dev->ISR & I2C_ISR_TC)) {}
/* send STOP condition */
DEBUG("Generate stop condition\n");

10
cpu/stm32f3/periph/spi.c
View File

@ -314,13 +314,13 @@ int spi_transfer_byte(spi_t dev, char out, char *in)
volatile uint8_t *DR = (volatile uint8_t*) &spi[dev]->DR;
/* wait for an eventually previous byte to be readily transferred */
while(!(spi[dev]->SR & SPI_SR_TXE));
while(!(spi[dev]->SR & SPI_SR_TXE)) {}
/* put next byte into the output register */
*DR = out;
/* wait until the current byte was successfully transferred */
while(!(spi[dev]->SR & SPI_SR_RXNE) );
while(!(spi[dev]->SR & SPI_SR_RXNE)) {}
/* read response byte to reset flags */
tmp = *DR;
@ -366,19 +366,19 @@ void spi_poweroff(spi_t dev)
switch (dev) {
#if SPI_0_EN
case SPI_0:
while (SPI_0_DEV->SR & SPI_SR_BSY);
while (SPI_0_DEV->SR & SPI_SR_BSY) {}
SPI_0_CLKDIS();
break;
#endif
#if SPI_1_EN
case SPI_1:
while (SPI_1_DEV->SR & SPI_SR_BSY);
while (SPI_1_DEV->SR & SPI_SR_BSY) {}
SPI_1_CLKDIS();
break;
#endif
#if SPI_2_EN
case SPI_2:
while (SPI_2_DEV->SR & SPI_SR_BSY);
while (SPI_2_DEV->SR & SPI_SR_BSY) {}
SPI_2_CLKDIS();
break;
#endif

2
cpu/stm32f3/periph/uart.c
View File

@ -179,7 +179,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
}
for (size_t i = 0; i < len; i++) {
while (!(dev->ISR & USART_ISR_TXE));
while (!(dev->ISR & USART_ISR_TXE)) {}
dev->TDR = data[i];
}
}