cpu/stm32f3: Use {} notation for empty while loops
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96a7583c2a
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3f122fbba2
@ -66,7 +66,7 @@ static void cpu_clock_init(void)
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RCC->CR |= RCC_CR_HSEON;
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RCC->CR |= RCC_CR_HSEON;
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/* wait for HSE to be ready */
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/* wait for HSE to be ready */
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while (!(RCC->CR & RCC_CR_HSERDY));
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while (!(RCC->CR & RCC_CR_HSERDY)) {}
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/* setup the peripheral bus prescalers */
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/* setup the peripheral bus prescalers */
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@ -91,7 +91,7 @@ static void cpu_clock_init(void)
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/* enable PLL again */
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/* enable PLL again */
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RCC->CR |= RCC_CR_PLLON;
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RCC->CR |= RCC_CR_PLLON;
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/* wait until PLL is stable */
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/* wait until PLL is stable */
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while(!(RCC->CR & RCC_CR_PLLRDY));
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while(!(RCC->CR & RCC_CR_PLLRDY)) {}
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/* configure flash latency */
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/* configure flash latency */
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@ -110,5 +110,5 @@ static void cpu_clock_init(void)
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RCC->CFGR |= RCC_CFGR_SW_PLL;
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RCC->CFGR |= RCC_CFGR_SW_PLL;
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/* wait for sysclock to be stable */
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/* wait for sysclock to be stable */
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while (!(RCC->CFGR & RCC_CFGR_SWS_PLL));
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while (!(RCC->CFGR & RCC_CFGR_SWS_PLL)) {}
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}
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}
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@ -312,7 +312,7 @@ int i2c_read_regs(i2c_t dev, uint8_t address, uint8_t reg, char *data, int lengt
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/* wait for ack */
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/* wait for ack */
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DEBUG("Waiting for ACK\n");
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DEBUG("Waiting for ACK\n");
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while (!(i2c->ISR & I2C_ISR_TXIS));
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while (!(i2c->ISR & I2C_ISR_TXIS)) {}
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/* send register number */
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/* send register number */
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DEBUG("ACK received, write reg into DR\n");
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DEBUG("ACK received, write reg into DR\n");
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@ -391,7 +391,7 @@ int i2c_write_regs(i2c_t dev, uint8_t address, uint8_t reg, char *data, int leng
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/* wait for ack */
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/* wait for ack */
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DEBUG("Waiting for ACK\n");
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DEBUG("Waiting for ACK\n");
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while (!(i2c->ISR & I2C_ISR_TXIS));
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while (!(i2c->ISR & I2C_ISR_TXIS)) {}
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/* send register number */
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/* send register number */
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DEBUG("ACK received, write reg into DR\n");
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DEBUG("ACK received, write reg into DR\n");
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@ -427,14 +427,14 @@ void i2c_poweroff(i2c_t dev)
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switch (dev) {
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switch (dev) {
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#if I2C_0_EN
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#if I2C_0_EN
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case I2C_0:
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case I2C_0:
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while (I2C_0_DEV->ISR & I2C_ISR_BUSY);
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while (I2C_0_DEV->ISR & I2C_ISR_BUSY) {}
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I2C_0_CLKDIS();
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I2C_0_CLKDIS();
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break;
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break;
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#endif
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#endif
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#if I2C_1_EN
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#if I2C_1_EN
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case I2C_1:
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case I2C_1:
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while (I2C_1_DEV->ISR & I2C_ISR_BUSY);
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while (I2C_1_DEV->ISR & I2C_ISR_BUSY) {}
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I2C_0_CLKDIS();
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I2C_0_CLKDIS();
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break;
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break;
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@ -472,7 +472,7 @@ static inline void _read(I2C_TypeDef *dev, char *data, int length)
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for (int i = 0; i < length; i++) {
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for (int i = 0; i < length; i++) {
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/* wait for transfer to finish */
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/* wait for transfer to finish */
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DEBUG("Waiting for DR to be full\n");
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DEBUG("Waiting for DR to be full\n");
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while (!(dev->ISR & I2C_ISR_RXNE));
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while (!(dev->ISR & I2C_ISR_RXNE)) {}
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DEBUG("DR is now full\n");
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DEBUG("DR is now full\n");
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/* read data from data register */
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/* read data from data register */
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@ -486,7 +486,7 @@ static inline void _write(I2C_TypeDef *dev, char *data, int length)
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for (int i = 0; i < length; i++) {
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for (int i = 0; i < length; i++) {
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/* wait for ack */
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/* wait for ack */
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DEBUG("Waiting for ACK\n");
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DEBUG("Waiting for ACK\n");
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while (!(dev->ISR & I2C_ISR_TXIS));
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while (!(dev->ISR & I2C_ISR_TXIS)) {}
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/* write data to data register */
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/* write data to data register */
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DEBUG("Write byte %i to DR\n", i);
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DEBUG("Write byte %i to DR\n", i);
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@ -499,7 +499,7 @@ static inline void _stop(I2C_TypeDef *dev)
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{
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{
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/* make sure transfer is complete */
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/* make sure transfer is complete */
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DEBUG("Wait for transfer to be complete\n");
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DEBUG("Wait for transfer to be complete\n");
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while (!(dev->ISR & I2C_ISR_TC));
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while (!(dev->ISR & I2C_ISR_TC)) {}
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/* send STOP condition */
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/* send STOP condition */
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DEBUG("Generate stop condition\n");
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DEBUG("Generate stop condition\n");
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@ -314,13 +314,13 @@ int spi_transfer_byte(spi_t dev, char out, char *in)
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volatile uint8_t *DR = (volatile uint8_t*) &spi[dev]->DR;
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volatile uint8_t *DR = (volatile uint8_t*) &spi[dev]->DR;
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/* wait for an eventually previous byte to be readily transferred */
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/* wait for an eventually previous byte to be readily transferred */
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while(!(spi[dev]->SR & SPI_SR_TXE));
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while(!(spi[dev]->SR & SPI_SR_TXE)) {}
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/* put next byte into the output register */
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/* put next byte into the output register */
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*DR = out;
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*DR = out;
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/* wait until the current byte was successfully transferred */
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/* wait until the current byte was successfully transferred */
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while(!(spi[dev]->SR & SPI_SR_RXNE) );
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while(!(spi[dev]->SR & SPI_SR_RXNE)) {}
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/* read response byte to reset flags */
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/* read response byte to reset flags */
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tmp = *DR;
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tmp = *DR;
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@ -366,19 +366,19 @@ void spi_poweroff(spi_t dev)
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switch (dev) {
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switch (dev) {
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#if SPI_0_EN
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#if SPI_0_EN
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case SPI_0:
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case SPI_0:
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while (SPI_0_DEV->SR & SPI_SR_BSY);
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while (SPI_0_DEV->SR & SPI_SR_BSY) {}
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SPI_0_CLKDIS();
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SPI_0_CLKDIS();
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break;
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break;
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#endif
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#endif
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#if SPI_1_EN
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#if SPI_1_EN
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case SPI_1:
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case SPI_1:
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while (SPI_1_DEV->SR & SPI_SR_BSY);
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while (SPI_1_DEV->SR & SPI_SR_BSY) {}
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SPI_1_CLKDIS();
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SPI_1_CLKDIS();
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break;
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break;
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#endif
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#endif
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#if SPI_2_EN
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#if SPI_2_EN
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case SPI_2:
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case SPI_2:
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while (SPI_2_DEV->SR & SPI_SR_BSY);
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while (SPI_2_DEV->SR & SPI_SR_BSY) {}
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SPI_2_CLKDIS();
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SPI_2_CLKDIS();
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break;
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break;
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#endif
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#endif
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@ -179,7 +179,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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}
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}
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for (size_t i = 0; i < len; i++) {
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for (size_t i = 0; i < len; i++) {
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while (!(dev->ISR & USART_ISR_TXE));
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while (!(dev->ISR & USART_ISR_TXE)) {}
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dev->TDR = data[i];
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dev->TDR = data[i];
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}
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}
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}
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}
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