Merge pull request #3018 from kaspar030/saml21_add_rtt
saml21: add periph rtt support
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commit
401adb8b58
@ -1,6 +1,7 @@
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += cpp
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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FEATURES_MCU_GROUP = cortex_m0
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@ -94,6 +94,15 @@ extern "C" {
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#define RTC_NUMOF (0)
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/** @} */
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/**
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* @name RTT configuration
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* @{
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*/
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#define RTT_FREQUENCY (32768U)
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#define RTT_MAX_VALUE (0xffffffffU)
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#define RTT_NUMOF (1)
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/** @} */
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/**
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* @name GPIO configuration
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* @{
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150
cpu/saml21/periph/rtt.c
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150
cpu/saml21/periph/rtt.c
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@ -0,0 +1,150 @@
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/*
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* Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
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* 2015 FreshTemp, LLC.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup driver_periph
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* @{
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*
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* @file rtt.c
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* @brief Low-level RTT driver implementation
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*
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* @author Kaspar Schleiser <kaspar@schleiser.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include "periph/rtt.h"
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#include "board.h"
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#include "thread.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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static rtt_cb_t _overflow_cb;
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static void* _overflow_arg;
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static rtt_cb_t _cmp0_cb;
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static void* _cmp0_arg;
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void rtt_init(void)
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{
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DEBUG("%s:%d\n", __func__, __LINE__);
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rtt_poweron();
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/* reset */
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RTC->MODE0.CTRLA.bit.SWRST = 1;
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while(RTC->MODE0.CTRLA.bit.SWRST);
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/* set 32bit counting mode */
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RTC->MODE0.CTRLA.bit.MODE = 0;
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/* set clock source */
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OSC32KCTRL->RTCCTRL.reg = OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K;
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/* enable */
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RTC->MODE0.CTRLA.bit.ENABLE = 1;
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while(RTC->MODE0.SYNCBUSY.bit.ENABLE);
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/* initially clear flag */
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RTC->MODE0.INTFLAG.bit.CMP0 = 1;
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/* enable RTT IRQ */
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NVIC_EnableIRQ(RTC_IRQn);
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DEBUG("%s:%d %u\n", __func__, __LINE__, (unsigned)rtt_get_counter());
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}
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void rtt_set_overflow_cb(rtt_cb_t cb, void *arg)
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{
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DEBUG("%s:%d\n", __func__, __LINE__);
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/* clear overflow cb to avoid race while assigning */
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rtt_clear_overflow_cb();
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/* set callback variables */
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_overflow_cb = cb;
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_overflow_arg = arg;
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/* enable overflow interrupt */
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RTC->MODE0.INTENSET.bit.OVF = 1;
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}
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void rtt_clear_overflow_cb(void)
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{
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DEBUG("%s:%d\n", __func__, __LINE__);
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/* disable overflow interrupt */
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RTC->MODE0.INTENCLR.bit.OVF = 1;
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}
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uint32_t rtt_get_counter(void)
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{
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DEBUG("%s:%d\n", __func__, __LINE__);
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while (RTC->MODE0.SYNCBUSY.bit.COUNT);
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return RTC->MODE0.COUNT.reg;
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}
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void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
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{
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DEBUG("%s:%d alarm=%u\n", __func__, __LINE__, (unsigned)alarm);
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/* disable interrupt to avoid race */
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rtt_clear_alarm();
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/* set COM register */
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while (RTC->MODE0.SYNCBUSY.bit.COMP0);
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RTC->MODE0.COMP[0].reg = alarm;
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/* setup callback */
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_cmp0_cb = cb;
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_cmp0_arg = arg;
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/* enable compare interrupt */
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RTC->MODE0.INTENSET.bit.CMP0 = 1;
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}
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void rtt_clear_alarm(void)
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{
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DEBUG("%s:%d\n", __func__, __LINE__);
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/* clear compare interrupt */
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RTC->MODE0.INTENCLR.bit.CMP0 = 1;
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}
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void rtt_poweron(void)
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{
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DEBUG("%s:%d\n", __func__, __LINE__);
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MCLK->APBAMASK.reg |= MCLK_APBAMASK_RTC;
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}
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void rtt_poweroff(void)
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{
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DEBUG("%s:%d\n", __func__, __LINE__);
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MCLK->APBAMASK.reg &= ~MCLK_APBAMASK_RTC;
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}
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void isr_rtc(void)
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{
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if (RTC->MODE0.INTFLAG.bit.OVF) {
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RTC->MODE0.INTFLAG.bit.OVF = 1;
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if (_overflow_cb) {
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_overflow_cb(_overflow_arg);
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}
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}
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if (RTC->MODE0.INTFLAG.bit.CMP0) {
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/* clear flag */
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RTC->MODE0.INTFLAG.bit.CMP0 = 1;
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/* disable interrupt */
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RTC->MODE0.INTENCLR.bit.CMP0 = 1;
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if (_cmp0_cb) {
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_cmp0_cb(_cmp0_arg);
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}
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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