cpu: mips32r2_common: set BITARITHM_HAS_CLZ

The MIPS ISA implements CLZ:

https://ti.tuwien.ac.at/cps/teaching/courses/cavo/files/MIPS32-IS.pdf

For `tests/periph_gpio` this shaves off 20 bytes on `6lowpan-clicker`.

cpu/mips32r2_common/include/cpu.h

@@ -32,6 +32,14 @@
 extern "C" {
 #endif
 
+/**
+ * @brief   Select fastest bitarithm_lsb implementation
+ * @{
+ */
+#define BITARITHM_LSB_BUILTIN
+#define BITARITHM_HAS_CLZ
+/** @} */
+
 /**
  * @brief   Print the last instruction's address
  *