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Merge pull request #12291 from keestux/sam0-refactor-adc0

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boards/sam0: refactor ADC_0 into plain ADC
This commit is contained in:
Dylan Laduranty 2019-10-07 09:20:38 +02:00 committed by GitHub
commit 40b65c16e2
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GPG Key ID: 4AEE18F83AFDEB23
14 changed files with 103 additions and 168 deletions
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19
boards/common/arduino-mkr/include/periph_conf_common.h
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@ -151,19 +151,13 @@ static const pwm_conf_t pwm_config[] = {
* @name ADC configuration * @name ADC configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 14
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -176,8 +170,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* A6 */ {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* A6 */
}; };
#define ADC_0_CHANNELS (7U) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

12
boards/common/saml1x/include/periph_conf.h
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@ -141,19 +141,19 @@ static const i2c_conf_t i2c_config[] = {
* @name ADC Configuration * @name ADC Configuration
* @{ * @{
*/ */
#define ADC_NUMOF (1U)
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
{GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN8)}, {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN8)},
}; };
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus

19
boards/feather-m0/include/periph_conf.h
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@ -178,19 +178,13 @@ static const pwm_conf_t pwm_config[] = {
* @name ADC configuration * @name ADC configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 14
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -203,8 +197,7 @@ static const adc_conf_chan_t adc_channels[] = {
{ GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7 }, /* A7 */ { GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7 }, /* A7 */
}; };
#define ADC_0_CHANNELS (7U) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

19
boards/hamilton/include/periph_conf.h
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@ -157,19 +157,13 @@ static const tc32_conf_t timer_config[] = {
* @name ADC Configuration * @name ADC Configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 14
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -178,8 +172,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 8), ADC_INPUTCTRL_MUXPOS_PIN16}, {GPIO_PIN(PA, 8), ADC_INPUTCTRL_MUXPOS_PIN16},
}; };
#define ADC_0_CHANNELS (3U) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

19
boards/samd21-xpro/include/periph_conf.h
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@ -303,19 +303,13 @@ static const i2c_conf_t i2c_config[] = {
* @name ADC Configuration * @name ADC Configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 14
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -329,8 +323,7 @@ static const adc_conf_chan_t adc_channels[] = {
Move PA03 SELECT jumper to EXT3 to connect. */ Move PA03 SELECT jumper to EXT3 to connect. */
}; };
#define ADC_0_CHANNELS (6U) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus

12
boards/saml21-xpro/include/periph_conf.h
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@ -155,11 +155,12 @@ static const i2c_conf_t i2c_config[] = {
* @name ADC Configuration * @name ADC Configuration
* @{ * @{
*/ */
#define ADC_NUMOF (3U)
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -168,8 +169,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN0)} {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN0)}
}; };
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus

19
boards/samr21-xpro/include/periph_conf.h
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@ -274,19 +274,13 @@ static const i2c_conf_t i2c_config[] = {
* @name ADC Configuration * @name ADC Configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 14
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -294,8 +288,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* EXT1, pin 4 */ {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* EXT1, pin 4 */
}; };
#define ADC_0_CHANNELS (2U) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

12
boards/samr30-xpro/include/periph_conf.h
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@ -138,11 +138,12 @@ static const i2c_conf_t i2c_config[] = {
* @name ADC Configuration * @name ADC Configuration
* @{ * @{
*/ */
#define ADC_NUMOF (5U)
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -153,8 +154,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN0)} {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN0)}
}; };
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus

11
boards/samr34-xpro/include/periph_conf.h
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@ -140,11 +140,12 @@ static const i2c_conf_t i2c_config[] = {
* @name ADC Configuration * @name ADC Configuration
* @{ * @{
*/ */
#define ADC_NUMOF (2U)
/* ADC 0 Default values */ /* ADC 0 Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256
#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -152,8 +153,8 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN7)} {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN7)}
}; };
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus

18
boards/sensebox_samd21/include/periph_conf.h
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@ -213,18 +213,13 @@ static const i2c_conf_t i2c_config[] = {
* @name ADC configuration * @name ADC configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
/* Digital pins (1 to 6) on the board can be configured as analog inputs */ /* Digital pins (1 to 6) on the board can be configured as analog inputs */
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
@ -237,8 +232,7 @@ static const adc_conf_chan_t adc_channels[] = {
{ GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0 }, /* Digital 6 */ { GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0 }, /* Digital 6 */
}; };
#define ADC_0_CHANNELS (6U) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

19
boards/sodaq-explorer/include/periph_conf.h
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@ -165,19 +165,13 @@ static const uart_conf_t uart_config[] = {
* @name ADC configuration * @name ADC configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 17
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -190,8 +184,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4}, /* A6 (temperature) */ {GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4}, /* A6 (temperature) */
}; };
#define ADC_0_CHANNELS (7U) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

19
boards/sodaq-one/include/periph_conf.h
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@ -158,19 +158,13 @@ static const uart_conf_t uart_config[] = {
* @name ADC configuration * @name ADC configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 17
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -192,8 +186,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5}, /* BAT_VOLT */ {GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5}, /* BAT_VOLT */
}; };
#define ADC_0_CHANNELS (12) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

19
boards/sodaq-sara-aff/include/periph_conf.h
View File

@ -160,19 +160,13 @@ static const uart_conf_t uart_config[] = {
* @name ADC configuration * @name ADC configuration
* @{ * @{
*/ */
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 19
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* ADC 0 Default values */ /* ADC Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
static const adc_conf_chan_t adc_channels[] = { static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */ /* port, pin, muxpos */
@ -189,8 +183,7 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1}, /* AREF */ {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1}, /* AREF */
}; };
#define ADC_0_CHANNELS (11) #define ADC_NUMOF ARRAY_SIZE(adc_channels)
#define ADC_NUMOF ADC_0_CHANNELS
/** @} */ /** @} */
/** /**

54
cpu/sam0_common/periph/adc.c
View File

@ -28,10 +28,6 @@
#define ENABLE_DEBUG (0) #define ENABLE_DEBUG (0)
#include "debug.h" #include "debug.h"
/* ADC 0 device configuration */
#define ADC_0_DEV ADC
#define ADC_0_IRQ ADC_IRQn
/* Prototypes */ /* Prototypes */
static bool _adc_syncing(void); static bool _adc_syncing(void);
static void _adc_poweroff(void); static void _adc_poweroff(void);
@ -52,11 +48,11 @@ static inline void _done(void)
static bool _adc_syncing(void) static bool _adc_syncing(void)
{ {
#ifdef CPU_SAMD21 #ifdef CPU_SAMD21
if (ADC_0_DEV->STATUS.reg & ADC_STATUS_SYNCBUSY) { if (ADC->STATUS.reg & ADC_STATUS_SYNCBUSY) {
return true; return true;
} }
#else /* CPU_SAML21 */ #else /* CPU_SAML21 */
if (ADC_0_DEV->SYNCBUSY.reg) { if (ADC->SYNCBUSY.reg) {
return true; return true;
} }
#endif #endif
@ -67,15 +63,15 @@ static void _adc_poweroff(void)
{ {
while (_adc_syncing()) {} while (_adc_syncing()) {}
/* Disable */ /* Disable */
ADC_0_DEV->CTRLA.reg &= ~ADC_CTRLA_ENABLE; ADC->CTRLA.reg &= ~ADC_CTRLA_ENABLE;
while (_adc_syncing()) {} while (_adc_syncing()) {}
/* Disable bandgap */ /* Disable bandgap */
#ifdef CPU_SAMD21 #ifdef CPU_SAMD21
if (ADC_0_REF_DEFAULT == ADC_REFCTRL_REFSEL_INT1V) { if (ADC_REF_DEFAULT == ADC_REFCTRL_REFSEL_INT1V) {
SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_BGOUTEN; SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_BGOUTEN;
} }
#else /* CPU_SAML21 */ #else /* CPU_SAML21 */
if (ADC_0_REF_DEFAULT == ADC_REFCTRL_REFSEL_INTREF) { if (ADC_REF_DEFAULT == ADC_REFCTRL_REFSEL_INTREF) {
SUPC->VREF.reg &= ~SUPC_VREF_VREFOE; SUPC->VREF.reg &= ~SUPC_VREF_VREFOE;
} }
#endif #endif
@ -89,8 +85,8 @@ static int _adc_configure(adc_res_t res)
assert((res == ADC_RES_8BIT) || (res == ADC_RES_10BIT) || assert((res == ADC_RES_8BIT) || (res == ADC_RES_10BIT) ||
(res == ADC_RES_12BIT)); (res == ADC_RES_12BIT));
_adc_poweroff(); _adc_poweroff();
if (ADC_0_DEV->CTRLA.reg & ADC_CTRLA_SWRST || if (ADC->CTRLA.reg & ADC_CTRLA_SWRST ||
ADC_0_DEV->CTRLA.reg & ADC_CTRLA_ENABLE ) { ADC->CTRLA.reg & ADC_CTRLA_ENABLE ) {
_done(); _done();
DEBUG("adc: not ready\n"); DEBUG("adc: not ready\n");
return -1; return -1;
@ -102,21 +98,21 @@ static int _adc_configure(adc_res_t res)
GCLK->CLKCTRL.reg = (uint32_t)(GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK->CLKCTRL.reg = (uint32_t)(GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 |
(GCLK_CLKCTRL_ID(ADC_GCLK_ID))); (GCLK_CLKCTRL_ID(ADC_GCLK_ID)));
/* Configure CTRLB Register HERE IS THE RESOLUTION SET! */ /* Configure CTRLB Register HERE IS THE RESOLUTION SET! */
ADC_0_DEV->CTRLB.reg = ADC_0_PRESCALER | res; ADC->CTRLB.reg = ADC_PRESCALER | res;
/* Load the fixed device calibration constants */ /* Load the fixed device calibration constants */
ADC_0_DEV->CALIB.reg = ADC->CALIB.reg =
ADC_CALIB_BIAS_CAL((*(uint32_t*)ADC_FUSES_BIASCAL_ADDR >> ADC_CALIB_BIAS_CAL((*(uint32_t*)ADC_FUSES_BIASCAL_ADDR >>
ADC_FUSES_BIASCAL_Pos)) | ADC_FUSES_BIASCAL_Pos)) |
ADC_CALIB_LINEARITY_CAL((*(uint64_t*)ADC_FUSES_LINEARITY_0_ADDR >> ADC_CALIB_LINEARITY_CAL((*(uint64_t*)ADC_FUSES_LINEARITY_0_ADDR >>
ADC_FUSES_LINEARITY_0_Pos)); ADC_FUSES_LINEARITY_0_Pos));
/* Set Voltage Reference */ /* Set Voltage Reference */
ADC_0_DEV->REFCTRL.reg = ADC_0_REF_DEFAULT; ADC->REFCTRL.reg = ADC_REF_DEFAULT;
/* Disable all interrupts */ /* Disable all interrupts */
ADC_0_DEV->INTENCLR.reg = (ADC_INTENCLR_SYNCRDY) | (ADC_INTENCLR_WINMON) | ADC->INTENCLR.reg = (ADC_INTENCLR_SYNCRDY) | (ADC_INTENCLR_WINMON) |
(ADC_INTENCLR_OVERRUN) | (ADC_INTENCLR_RESRDY); (ADC_INTENCLR_OVERRUN) | (ADC_INTENCLR_RESRDY);
while (_adc_syncing()) {} while (_adc_syncing()) {}
/* Enable bandgap if VREF is internal 1V */ /* Enable bandgap if VREF is internal 1V */
if (ADC_0_REF_DEFAULT == ADC_REFCTRL_REFSEL_INT1V) { if (ADC_REF_DEFAULT == ADC_REFCTRL_REFSEL_INT1V) {
SYSCTRL->VREF.reg |= SYSCTRL_VREF_BGOUTEN; SYSCTRL->VREF.reg |= SYSCTRL_VREF_BGOUTEN;
} }
#else /* CPU_SAML21 */ #else /* CPU_SAML21 */
@ -129,27 +125,27 @@ static int _adc_configure(adc_res_t res)
/* GCLK Setup */ /* GCLK Setup */
GCLK->PCHCTRL[ADC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK0; GCLK->PCHCTRL[ADC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK0;
/* Set Voltage Reference */ /* Set Voltage Reference */
ADC_0_DEV->REFCTRL.reg = ADC_0_REF_DEFAULT; ADC->REFCTRL.reg = ADC_REF_DEFAULT;
/* Configure CTRLB & CTRLC Register */ /* Configure CTRLB & CTRLC Register */
ADC_0_DEV->CTRLB.reg = ADC_0_PRESCALER; ADC->CTRLB.reg = ADC_PRESCALER;
ADC_0_DEV->CTRLC.reg |= res; ADC->CTRLC.reg |= res;
/* Disable all interrupts */ /* Disable all interrupts */
ADC_0_DEV->INTENCLR.reg = ADC_INTENCLR_WINMON | ADC_INTENCLR_OVERRUN | ADC->INTENCLR.reg = ADC_INTENCLR_WINMON | ADC_INTENCLR_OVERRUN |
ADC_INTENCLR_RESRDY; ADC_INTENCLR_RESRDY;
/* Set default calibration from NVM */ /* Set default calibration from NVM */
ADC_0_DEV->CALIB.reg = ADC->CALIB.reg =
ADC_FUSES_BIASCOMP((*(uint32_t*)ADC_FUSES_BIASCOMP_ADDR)) >> ADC_FUSES_BIASCOMP((*(uint32_t*)ADC_FUSES_BIASCOMP_ADDR)) >>
ADC_CALIB_BIASCOMP_Pos | ADC_CALIB_BIASCOMP_Pos |
ADC_FUSES_BIASREFBUF((*(uint32_t*)ADC_FUSES_BIASREFBUF_ADDR) >> ADC_FUSES_BIASREFBUF((*(uint32_t*)ADC_FUSES_BIASREFBUF_ADDR) >>
ADC_FUSES_BIASREFBUF_Pos); ADC_FUSES_BIASREFBUF_Pos);
while (_adc_syncing()) {} while (_adc_syncing()) {}
/* Enable bandgap if necessary */ /* Enable bandgap if necessary */
if (ADC_0_REF_DEFAULT == ADC_REFCTRL_REFSEL_INTREF) { if (ADC_REF_DEFAULT == ADC_REFCTRL_REFSEL_INTREF) {
SUPC->VREF.reg |= SUPC_VREF_VREFOE; SUPC->VREF.reg |= SUPC_VREF_VREFOE;
} }
#endif #endif
/* Enable ADC Module */ /* Enable ADC Module */
ADC_0_DEV->CTRLA.reg |= ADC_CTRLA_ENABLE; ADC->CTRLA.reg |= ADC_CTRLA_ENABLE;
while (_adc_syncing()) {} while (_adc_syncing()) {}
return 0; return 0;
} }
@ -180,17 +176,17 @@ int adc_sample(adc_t line, adc_res_t res)
return -1; return -1;
} }
#ifdef CPU_SAMD21 #ifdef CPU_SAMD21
ADC_0_DEV->INPUTCTRL.reg = ADC_0_GAIN_FACTOR_DEFAULT | ADC->INPUTCTRL.reg = ADC_GAIN_FACTOR_DEFAULT |
adc_channels[line].muxpos | ADC_0_NEG_INPUT; adc_channels[line].muxpos | ADC_NEG_INPUT;
#else /* CPU_SAML21 */ #else /* CPU_SAML21 */
ADC_0_DEV->INPUTCTRL.reg = adc_channels[line].muxpos | ADC_0_NEG_INPUT; ADC->INPUTCTRL.reg = adc_channels[line].muxpos | ADC_NEG_INPUT;
#endif #endif
while (_adc_syncing()) {} while (_adc_syncing()) {}
/* Start the conversion */ /* Start the conversion */
ADC_0_DEV->SWTRIG.reg = ADC_SWTRIG_START; ADC->SWTRIG.reg = ADC_SWTRIG_START;
/* Wait for the result */ /* Wait for the result */
while (!(ADC_0_DEV->INTFLAG.reg & ADC_INTFLAG_RESRDY)) {} while (!(ADC->INTFLAG.reg & ADC_INTFLAG_RESRDY)) {}
int result = ADC_0_DEV->RESULT.reg; int result = ADC->RESULT.reg;
_adc_poweroff(); _adc_poweroff();
_done(); _done();
return result; return result;