cpu/cc2538: uart init overhaul
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aca53006b0
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@ -197,17 +197,12 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t t
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int uart_init_blocking(uart_t uart, uint32_t baudrate)
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{
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cc2538_uart_t *u;
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unsigned int uart_num;
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uint32_t divisor;
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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u = UART_0_DEV;
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/* Run on SYS_DIV */
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u->CC = 0;
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/*
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* Select the UARTx RX pin by writing to the IOC_UARTRXD_UARTn register
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*/
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@ -230,9 +225,6 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
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case UART_1:
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u = UART_1_DEV;
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/* Run on SYS_DIV */
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u->CC = 0;
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/*
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* Select the UARTx RX pin by writing to the IOC_UARTRXD_UARTn register
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*/
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@ -249,28 +241,44 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
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/* Set RX and TX pins to peripheral mode */
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gpio_hardware_control(UART_1_TX_PIN);
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gpio_hardware_control(UART_1_RX_PIN);
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#ifdef UART_1_RTS_PIN
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IOC_PXX_SEL[UART_1_RTS_PIN] = UART1_RTS;
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gpio_hardware_control(UART_1_RTS_PIN);
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IOC_PXX_OVER[UART_1_RTS_PIN] = IOC_OVERRIDE_OE;
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u->CTLbits.RTSEN = 1;
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#endif
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#ifdef UART_1_CTS_PIN
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IOC_UARTCTS_UART1 = UART_1_CTS_PIN;
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gpio_hardware_control(UART_1_CTS_PIN);
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IOC_PXX_OVER[UART_1_CTS_PIN] = IOC_OVERRIDE_DIS;
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u->CTLbits.CTSEN = 1;
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#endif
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break;
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#endif
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default:
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(void)u;
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return -1;
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}
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#if UART_0_EN || UART_1_EN
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/* Enable clock for the UART while Running, in Sleep and Deep Sleep */
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unsigned int uart_num = ( (uintptr_t)u - (uintptr_t)UART0 ) / 0x1000;
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SYS_CTRL_RCGCUART |= (1 << uart_num);
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SYS_CTRL_SCGCUART |= (1 << uart_num);
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SYS_CTRL_DCGCUART |= (1 << uart_num);
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/* Make sure the UART is disabled before trying to configure it */
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u->CTL = 0;
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/* Run on SYS_DIV */
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u->CC = 0;
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/* On the CC2538, hardware flow control is supported only on UART1 */
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if (u == UART1) {
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#ifdef UART_1_RTS_PIN
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IOC_PXX_SEL[UART_1_RTS_PIN] = UART1_RTS;
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gpio_hardware_control(UART_1_RTS_PIN);
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IOC_PXX_OVER[UART_1_RTS_PIN] = IOC_OVERRIDE_OE;
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u->CTLbits.RTSEN = 1;
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#endif
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#ifdef UART_1_CTS_PIN
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IOC_UARTCTS_UART1 = UART_1_CTS_PIN;
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gpio_hardware_control(UART_1_CTS_PIN);
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IOC_PXX_OVER[UART_1_CTS_PIN] = IOC_OVERRIDE_DIS;
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u->CTLbits.CTSEN = 1;
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#endif
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}
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/* Enable clock for the UART while Running, in Sleep and Deep Sleep */
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uart_num = ( (uintptr_t)u - (uintptr_t)UART0 ) / 0x1000;
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SYS_CTRL_RCGCUART |= (1 << uart_num);
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@ -293,15 +301,12 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
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u->IFLSbits.RXIFLSEL = FIFO_LEVEL_1_8TH;
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u->IFLSbits.TXIFLSEL = FIFO_LEVEL_4_8TH;
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/* Make sure the UART is disabled before trying to configure it */
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u->CTL = 0;
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u->CTLbits.RXE = 1;
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u->CTLbits.TXE = 1;
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u->CTLbits.HSE = UART_CTL_HSE_VALUE;
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/* Set the divisor for the baud rate generator */
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divisor = sys_clock_freq();
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uint32_t divisor = sys_clock_freq();
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divisor <<= UART_CTL_HSE_VALUE + 2;
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divisor += baudrate / 2; /**< Avoid a rounding error */
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divisor /= baudrate;
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@ -318,6 +323,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
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u->CTLbits.UARTEN = 1;
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return 0;
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#endif /* UART_0_EN || UART_1_EN */
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}
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void uart_tx_begin(uart_t uart)
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