diff --git a/cpu/stm32/periph/pwm.c b/cpu/stm32/periph/pwm.c
index 3fbf5c0e7e..c96ff97050 100644
--- a/cpu/stm32/periph/pwm.c
+++ b/cpu/stm32/periph/pwm.c
@@ -29,11 +29,11 @@
 #include "periph/pwm.h"
 #include "periph/gpio.h"
 
-#define CCMR_LEFT           (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | \
+#define CCMR_MODE1          (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | \
                              TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2)
-#define CCMR_RIGHT          (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1 | \
+#define CCMR_MODE2          (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1 | \
                              TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_0 | \
-                             TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2);
+                             TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2)
 
 static inline TIM_TypeDef *dev(pwm_t pwm)
 {
@@ -44,6 +44,10 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res)
 {
     uint32_t timer_clk = periph_timer_clk(pwm_config[pwm].bus);
 
+    /* in PWM_CENTER mode the counter counts up and down at each period
+     * so the resolution had to be divided by 2 */
+    res *= (mode == PWM_CENTER) ? 2 : 1;
+
     /* verify parameters */
     assert((pwm < PWM_NUMOF) && ((freq * res) <= timer_clk));
 
@@ -53,7 +57,7 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res)
     dev(pwm)->CR1 = 0;
     dev(pwm)->CR2 = 0;
     for (unsigned i = 0; i < TIMER_CHANNEL_NUMOF; ++i) {
-        TIM_CHAN(pwm, i) = 0;
+        TIM_CHAN(pwm, i) = (mode == PWM_RIGHT) ? res : 0;
     }
 
     /* configure the used pins */
@@ -67,21 +71,23 @@ uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res)
     /* configure the PWM frequency and resolution by setting the auto-reload
      * and prescaler registers */
     dev(pwm)->PSC = (timer_clk / (res * freq)) - 1;
-    dev(pwm)->ARR = res - 1;
+    dev(pwm)->ARR = (mode == PWM_CENTER) ? (res / 2) : res - 1;
 
     /* set PWM mode */
     switch (mode) {
         case PWM_LEFT:
-            dev(pwm)->CCMR1 = CCMR_LEFT;
-            dev(pwm)->CCMR2 = CCMR_LEFT;
+            dev(pwm)->CCMR1 = CCMR_MODE1;
+            dev(pwm)->CCMR2 = CCMR_MODE1;
             break;
         case PWM_RIGHT:
-            dev(pwm)->CCMR1 = CCMR_RIGHT;
-            dev(pwm)->CCMR2 = CCMR_RIGHT;
+            dev(pwm)->CCMR1 = CCMR_MODE2;
+            dev(pwm)->CCMR2 = CCMR_MODE2;
+            /* duty cycle should be reversed */
             break;
         case PWM_CENTER:
-            dev(pwm)->CCMR1 = 0;
-            dev(pwm)->CCMR2 = 0;
+            dev(pwm)->CCMR1 = CCMR_MODE1;
+            dev(pwm)->CCMR2 = CCMR_MODE1;
+            /* center-aligned mode 3 */
             dev(pwm)->CR1 |= (TIM_CR1_CMS_0 | TIM_CR1_CMS_1);
             break;
     }
@@ -116,9 +122,15 @@ void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value)
            (pwm_config[pwm].chan[channel].pin != GPIO_UNDEF));
 
     /* norm value to maximum possible value */
-    if (value > dev(pwm)->ARR) {
-        value = (uint16_t)dev(pwm)->ARR;
+    if (value > dev(pwm)->ARR + 1) {
+        value = (uint16_t)dev(pwm)->ARR + 1;
     }
+
+    if (dev(pwm)->CCMR1 == CCMR_MODE2) {
+        /* reverse the value */
+        value = (uint16_t)dev(pwm)->ARR + 1 - value;
+    }
+
     /* set new value */
     TIM_CHAN(pwm, pwm_config[pwm].chan[channel].cc_chan) = value;
 }