diff --git a/boards/nucleo-f334r8/Kconfig b/boards/nucleo-f334r8/Kconfig
index 9c7581dc6a..a3170c0157 100644
--- a/boards/nucleo-f334r8/Kconfig
+++ b/boards/nucleo-f334r8/Kconfig
@@ -15,6 +15,7 @@ config BOARD_NUCLEO_F334R8
     select CPU_MODEL_STM32F334R8
 
     # Put defined MCU peripherals here (in alphabetical order)
+    select HAS_PERIPH_DMA
     select HAS_PERIPH_PWM
     select HAS_PERIPH_RTC
     select HAS_PERIPH_SPI
diff --git a/boards/nucleo-f334r8/Makefile.features b/boards/nucleo-f334r8/Makefile.features
index 2ac97786cb..1526867a49 100644
--- a/boards/nucleo-f334r8/Makefile.features
+++ b/boards/nucleo-f334r8/Makefile.features
@@ -2,6 +2,7 @@ CPU = stm32
 CPU_MODEL = stm32f334r8
 
 # Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_dma
 FEATURES_PROVIDED += periph_pwm
 FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
diff --git a/boards/nucleo-f334r8/include/periph_conf.h b/boards/nucleo-f334r8/include/periph_conf.h
index 7ebdf87f1c..52bbf92b86 100644
--- a/boards/nucleo-f334r8/include/periph_conf.h
+++ b/boards/nucleo-f334r8/include/periph_conf.h
@@ -56,20 +56,42 @@ extern "C" {
 #define CLOCK_PLL_MUL        (9)
 /** @} */
 
+/**
+ * @name    DMA streams configuration
+ * @{
+ */
+static const dma_conf_t dma_config[] = {
+    { .stream = 1 },    /* DMA1 Channel 2 - SPI1_RX | USART3_TX */
+    { .stream = 2 },    /* DMA1 Channel 3 - SPI1_TX */
+    { .stream = 3 },    /* DMA1 Channel 4 - USART1_TX */
+    { .stream = 6 },    /* DMA1 Channel 7 - USART2_TX */
+};
+
+#define DMA_0_ISR  isr_dma1_channel2
+#define DMA_1_ISR  isr_dma1_channel3
+#define DMA_2_ISR  isr_dma1_channel4
+#define DMA_3_ISR  isr_dma1_channel7
+#define DMA_NUMOF           ARRAY_SIZE(dma_config)
+/** @} */
+
 /**
  * @name   UART configuration
  * @{
  */
 static const uart_conf_t uart_config[] = {
     {
-        .dev      = USART2,
-        .rcc_mask = RCC_APB1ENR_USART2EN,
-        .rx_pin   = GPIO_PIN(PORT_A, 3),
-        .tx_pin   = GPIO_PIN(PORT_A, 2),
-        .rx_af    = GPIO_AF7,
-        .tx_af    = GPIO_AF7,
-        .bus      = APB1,
-        .irqn     = USART2_IRQn
+        .dev        = USART2,
+        .rcc_mask   = RCC_APB1ENR_USART2EN,
+        .rx_pin     = GPIO_PIN(PORT_A, 3),
+        .tx_pin     = GPIO_PIN(PORT_A, 2),
+        .rx_af      = GPIO_AF7,
+        .tx_af      = GPIO_AF7,
+        .bus        = APB1,
+        .irqn       = USART2_IRQn,
+#ifdef MODULE_PERIPH_DMA
+        .dma        = 3,
+        .dma_chan   = DMA_CHAN_CONFIG_UNSUPPORTED
+#endif
     },
     {
         .dev        = USART1,
@@ -79,8 +101,15 @@ static const uart_conf_t uart_config[] = {
         .rx_af      = GPIO_AF7,
         .tx_af      = GPIO_AF7,
         .bus        = APB2,
-        .irqn       = USART1_IRQn
+        .irqn       = USART1_IRQn,
+#ifdef MODULE_PERIPH_DMA
+        .dma        = 2,
+        .dma_chan   = DMA_CHAN_CONFIG_UNSUPPORTED
+#endif
     },
+/* SPI1 RX and USART3 are sharing the same DMA channel, so disable the
+ * third UART when both SPI and DMA features are enabled. */
+#if !defined(MODULE_PERIPH_SPI) || !defined(MODULE_PERIPH_DMA)
     {
         .dev        = USART3,
         .rcc_mask   = RCC_APB1ENR_USART3EN,
@@ -89,8 +118,13 @@ static const uart_conf_t uart_config[] = {
         .rx_af      = GPIO_AF7,
         .tx_af      = GPIO_AF7,
         .bus        = APB1,
-        .irqn       = USART3_IRQn
+        .irqn       = USART3_IRQn,
+#ifdef MODULE_PERIPH_DMA
+        .dma        = 0,
+        .dma_chan   = DMA_CHAN_CONFIG_UNSUPPORTED
+#endif
     }
+#endif /* !defined(MODULE_PERIPH_SPI) || !defined(MODULE_PERIPH_DMA) */
 };
 
 #define UART_0_ISR          (isr_usart2)
@@ -126,17 +160,23 @@ static const pwm_conf_t pwm_config[] = {
  */
 static const spi_conf_t spi_config[] = {
     {
-        .dev      = SPI1,
-        .mosi_pin = GPIO_PIN(PORT_A, 7),
-        .miso_pin = GPIO_PIN(PORT_A, 6),
-        .sclk_pin = GPIO_PIN(PORT_A, 5),
-        .cs_pin   = GPIO_UNDEF,
-        .mosi_af  = GPIO_AF5,
-        .miso_af  = GPIO_AF5,
-        .sclk_af  = GPIO_AF5,
-        .cs_af    = GPIO_AF5,
-        .rccmask  = RCC_APB2ENR_SPI1EN,
-        .apbbus   = APB2
+        .dev         = SPI1,
+        .mosi_pin    = GPIO_PIN(PORT_A, 7),
+        .miso_pin    = GPIO_PIN(PORT_A, 6),
+        .sclk_pin    = GPIO_PIN(PORT_A, 5),
+        .cs_pin      = GPIO_UNDEF,
+        .mosi_af     = GPIO_AF5,
+        .miso_af     = GPIO_AF5,
+        .sclk_af     = GPIO_AF5,
+        .cs_af       = GPIO_AF5,
+        .rccmask     = RCC_APB2ENR_SPI1EN,
+        .apbbus      = APB2,
+#ifdef MODULE_PERIPH_DMA
+        .tx_dma      = 1,
+        .tx_dma_chan = DMA_CHAN_CONFIG_UNSUPPORTED,
+        .rx_dma      = 0,
+        .rx_dma_chan = DMA_CHAN_CONFIG_UNSUPPORTED
+#endif
     }
 };