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boards/remote: add common default config headers

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Alexandre Abadie 2020-01-08 14:38:52 +01:00
parent 7480642776
commit 4a0ac8e4e8
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6 changed files with 340 additions and 0 deletions
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52
boards/common/remote/include/cfg_adc_default.h Normal file
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/*
* Copyright (C) 2014-2016 Freie Universität Berlin
* 2015 Zolertia SL
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_remote
* @{
*
* @file
* @brief Common default ADC configuration for the RE-Mote board revision A
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Antonio Lignan <alinan@zolertia.com>
* @author Sebastian Meiling <s@mlng.net>
*/
#ifndef CFG_ADC_DEFAULT_H
#define CFG_ADC_DEFAULT_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name ADC configuration
* @{
*/
#define SOC_ADC_ADCCON3_EREF SOC_ADC_ADCCON3_EREF_AVDD5
static const adc_conf_t adc_config[] = {
GPIO_PIN(PORT_A, 5), /**< GPIO_PA5 = ADC1_PIN */
GPIO_PIN(PORT_A, 4), /**< GPIO_PA4 = ADC2_PIN */
/* voltage divider with 5/3 relationship to allow 5V sensors */
GPIO_PIN(PORT_A, 2), /**< GPIO_PA2 = ADC3_PIN */
};
#define ADC_NUMOF ARRAY_SIZE(adc_config)
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif
#endif /* CFG_ADC_DEFAULT_H */
/** @} */

41
boards/common/remote/include/cfg_clk_default.h Normal file
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/*
* Copyright (C) 2014-2016 Freie Universität Berlin
* 2015 Zolertia SL
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_remote
* @{
*
* @file
* @brief Common default clock configuration for the RE-Mote board revision A
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Antonio Lignan <alinan@zolertia.com>
* @author Sebastian Meiling <s@mlng.net>
*/
#ifndef CFG_CLK_DEFAULT_H
#define CFG_CLK_DEFAULT_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Clock system configuration
* @{
*/
#define CLOCK_CORECLOCK (32000000U) /* 32MHz */
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif
#endif /* CFG_CLK_DEFAULT_H */
/** @} */

53
boards/common/remote/include/cfg_i2c_default.h Normal file
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/*
* Copyright (C) 2014-2016 Freie Universität Berlin
* 2015 Zolertia SL
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_remote
* @{
*
* @file
* @brief Common default I2C configuration for the RE-Mote board revision A
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Antonio Lignan <alinan@zolertia.com>
* @author Sebastian Meiling <s@mlng.net>
*/
#ifndef CFG_I2C_DEFAULT_H
#define CFG_I2C_DEFAULT_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name I2C configuration
* @{
*/
#define I2C_IRQ_PRIO 1
static const i2c_conf_t i2c_config[] = {
{
.speed = I2C_SPEED_FAST, /**< bus speed */
.scl_pin = GPIO_PIN(PORT_C, 3), /**< GPIO_PC3 */
.sda_pin = GPIO_PIN(PORT_C, 2) /**< GPIO_PC2 */
},
};
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif
#endif /* CFG_I2C_DEFAULT_H */
/** @} */

60
boards/common/remote/include/cfg_spi_default.h Normal file
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/*
* Copyright (C) 2014-2016 Freie Universität Berlin
* 2015 Zolertia SL
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_remote
* @{
*
* @file
* @brief Common default SPI configuration for the RE-Mote board revision A
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Antonio Lignan <alinan@zolertia.com>
* @author Sebastian Meiling <s@mlng.net>
*/
#ifndef CFG_SPI_DEFAULT_H
#define CFG_SPI_DEFAULT_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name SPI configuration
* @{
*/
static const spi_conf_t spi_config[] = {
{
.num = 0,
.mosi_pin = GPIO_PIN(PORT_B, 1),
.miso_pin = GPIO_PIN(PORT_B, 3),
.sck_pin = GPIO_PIN(PORT_B, 2),
.cs_pin = GPIO_PIN(PORT_B, 5)
},
{
.num = 1,
.mosi_pin = GPIO_PIN(PORT_C, 5),
.miso_pin = GPIO_PIN(PORT_C, 6),
.sck_pin = GPIO_PIN(PORT_C, 4),
.cs_pin = GPIO_PIN(PORT_A, 7)
}
};
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif
#endif /* CFG_SPI_DEFAULT_H */
/** @} */

68
boards/common/remote/include/cfg_timer_default.h Normal file
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/*
* Copyright (C) 2014-2016 Freie Universität Berlin
* 2015 Zolertia SL
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_remote
* @{
*
* @file
* @brief Common default timer configuration for the RE-Mote board revision A
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Antonio Lignan <alinan@zolertia.com>
* @author Sebastian Meiling <s@mlng.net>
*/
#ifndef CFG_TIMER_DEFAULT_H
#define CFG_TIMER_DEFAULT_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Timer configuration
*
* General purpose timers (GPT[0-3]) are configured consecutively and in order
* (without gaps) starting from GPT0, i.e. if multiple timers are enabled.
*
* @{
*/
static const timer_conf_t timer_config[] = {
{
.chn = 2,
.cfg = GPTMCFG_16_BIT_TIMER, /* required for XTIMER */
},
{
.chn = 1,
.cfg = GPTMCFG_32_BIT_TIMER,
},
{
.chn = 2,
.cfg = GPTMCFG_16_BIT_TIMER,
},
{
.chn = 1,
.cfg = GPTMCFG_32_BIT_TIMER,
},
};
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
#define TIMER_IRQ_PRIO 1
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif
#endif /* CFG_TIMER_DEFAULT_H */
/** @} */

66
boards/common/remote/include/cfg_uart_default.h Normal file
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/*
* Copyright (C) 2014-2016 Freie Universität Berlin
* 2015 Zolertia SL
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_remote
* @{
*
* @file
* @brief Common default UART configuration for the RE-Mote board revision A
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Antonio Lignan <alinan@zolertia.com>
* @author Sebastian Meiling <s@mlng.net>
*/
#ifndef CFG_UART_DEFAULT_H
#define CFG_UART_DEFAULT_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
/* UART0 is mapped to debug usb */
{
.dev = UART0_BASEADDR,
.rx_pin = GPIO_PIN(PORT_A, 0),
.tx_pin = GPIO_PIN(PORT_A, 1),
.cts_pin = GPIO_UNDEF,
.rts_pin = GPIO_UNDEF
},
{
.dev = UART1_BASEADDR,
.rx_pin = GPIO_PIN(PORT_C, 1),
.tx_pin = GPIO_PIN(PORT_C, 0),
.cts_pin = GPIO_UNDEF,
.rts_pin = GPIO_UNDEF
}
};
/* interrupt function name mapping */
#define UART_0_ISR isr_uart0
#define UART_1_ISR isr_uart1
/* macros common across all UARTs */
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif
#endif /* CFG_UART_DEFAULT_H */
/** @} */