cpu/stm32f0: added support for stm32f091rc

cpu/stm32f0/include/cpu-conf.h

@@ -24,6 +24,9 @@
 #ifdef CPU_MODEL_STM32F051R8
 #include "stm32f051x8.h"
 #endif
+#ifdef CPU_MODEL_STM32F091RC
+#include "stm32f091xc.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {

cpu/stm32f0/startup.c

@@ -117,6 +117,7 @@ void isr_tim1_cc(void)              __attribute__ ((weak, alias("dummy_handler")
 void isr_tim2(void)                 __attribute__ ((weak, alias("dummy_handler")));
 void isr_tim3(void)                 __attribute__ ((weak, alias("dummy_handler")));
 void isr_tim6_dac(void)             __attribute__ ((weak, alias("dummy_handler")));
+void isr_tim7(void)                 __attribute__ ((weak, alias("dummy_handler")));
 void isr_tim14(void)                __attribute__ ((weak, alias("dummy_handler")));
 void isr_tim15(void)                __attribute__ ((weak, alias("dummy_handler")));
 void isr_tim16(void)                __attribute__ ((weak, alias("dummy_handler")));
@@ -127,6 +128,7 @@ void isr_spi1(void)                 __attribute__ ((weak, alias("dummy_handler")
 void isr_spi2(void)                 __attribute__ ((weak, alias("dummy_handler")));
 void isr_usart1(void)               __attribute__ ((weak, alias("dummy_handler")));
 void isr_usart2(void)               __attribute__ ((weak, alias("dummy_handler")));
+void isr_usart3_8(void)             __attribute__ ((weak, alias("dummy_handler")));
 void isr_cec(void)                  __attribute__ ((weak, alias("dummy_handler")));
 
 /* interrupt vector table */
@@ -169,7 +171,7 @@ const void *interrupt_vector[] = {
     (void*) isr_tim2,               /* timer 2 */
     (void*) isr_tim3,               /* timer 3 */
     (void*) isr_tim6_dac,           /* timer 6 and digital to analog converter */
-    (void*) (0UL),                  /* reserved */
+    (void*) isr_tim7,               /* timer 7 */
     (void*) isr_tim14,              /* timer 14 */
     (void*) isr_tim15,              /* timer 15 */
     (void*) isr_tim16,              /* timer 16 */
@@ -180,7 +182,7 @@ const void *interrupt_vector[] = {
     (void*) isr_spi2,               /* SPI 2 */
     (void*) isr_usart1,             /* USART 1 */
     (void*) isr_usart2,             /* USART 2 */
-    (void*) (0UL),                  /* reserved */
+    (void*) isr_usart3_8,           /* USART 3 to 8 */
     (void*) isr_cec,                /* consumer electronics control */
     (void*) (0UL)                   /* reserved */
 };

cpu/stm32f0/stm32f091rc_linkerscript.ld

@@ -0,0 +1,146 @@
+/* ----------------------------------------------------------------------------
+ *         SAM Software Package License
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2012, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following condition is met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+    rom (rx)    : ORIGIN = 0x08000000, LENGTH = 256K
+    ram (rwx)   : ORIGIN = 0x20000000, LENGTH = 32K
+}
+
+/* Define the default stack size for interrupt mode. As no context is
+   saved on this stack and ISRs are supposed to be short, it can be fairly
+   small. 512 byte should be a save assumption here */
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x200; /* 512 byte */
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(0x4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    /* heap section */
+    . = ALIGN(4);
+    _sheap = . ;
+    _eheap = ORIGIN(ram) + LENGTH(ram);
+}