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cpu/sam0_common/Makefile.include: add CPU ROM and RAM lengths

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kYc0o 2017-10-13 18:45:35 +02:00
parent d25fd647e7
commit 4c86d95014
1 changed files with 11 additions and 2 deletions
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13
cpu/sam0_common/Makefile.include
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@ -1,11 +1,20 @@
# Define the CPU family so we can differentiate between them in the code
CFLAGS += -DCPU_FAM_$(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_')
# Set ROM and RAM lengths according to CPU model
ifneq (,$(filter samd21g18a samd21j18a saml21j18b saml21j18a samr21g18a,$(CPU_MODEL)))
ROM_LEN ?= 0x40000
RAM_LEN ?= 0x8000
endif
ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000
# this CPU implementation doesn't use CMSIS initialization
export CFLAGS += -DDONT_USE_CMSIS_INIT
# for the sam[drl] CPUs we hold all linkerscripts in the sam0 common folder
export LINKFLAGS += -L$(RIOTCPU)/sam0_common/ldscripts
# For Cortex-M cpu we use the common cortexm.ld linker script
LINKER_SCRIPT ?= cortexm.ld
# use common periph functions
USEMODULE += periph_common