diff --git a/cpu/stm32_common/include/periph_cpu_common.h b/cpu/stm32_common/include/periph_cpu_common.h
index 2083b08bb6..ef036dd564 100644
--- a/cpu/stm32_common/include/periph_cpu_common.h
+++ b/cpu/stm32_common/include/periph_cpu_common.h
@@ -78,7 +78,8 @@ extern "C" {
  * @brief   Number of usable low power modes
  */
 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
-    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || defined(DOXYGEN)
+    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
+    defined(CPU_FAM_STM32L1) || defined(DOXYGEN)
 #define PM_NUM_MODES    (2U)
 
 /**
diff --git a/cpu/stm32_common/periph/pm.c b/cpu/stm32_common/periph/pm.c
index b7dafd522b..356c38e4f6 100644
--- a/cpu/stm32_common/periph/pm.c
+++ b/cpu/stm32_common/periph/pm.c
@@ -26,7 +26,8 @@
 #include "irq.h"
 #include "periph/pm.h"
 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
-    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
+    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
+    defined(CPU_FAM_STM32L1)
 #include "stmclk.h"
 #endif
 
@@ -49,13 +50,22 @@ void pm_set(unsigned mode)
 /* I just copied it from stm32f1/2/4, but I suppose it would work for the
  * others... /KS */
 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
-    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
+    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
+    defined(CPU_FAM_STM32L1)
     switch (mode) {
         case STM32_PM_STANDBY:
             /* Set PDDS to enter standby mode on deepsleep and clear flags */
             PWR->CR |= (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF);
             /* Enable WKUP pin to use for wakeup from standby mode */
-#if defined(CPU_FAM_STM32L0)
+#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
+            /* Regarding ULP, it's up to the user to configure it :
+             * 0: Internal Vref enabled during Deepsleep/Sleep/Low-power run mode
+             * 1: Disable internal voltage reference
+             *    Deepsleep/Sleep/Low-power run mode
+             */
+            /* Enable Ultra Low Power mode */
+            // PWR->CR |= PWR_CR_ULP;
+
             PWR->CSR |= PWR_CSR_EWUP1;
 #if !defined(CPU_LINE_STM32L053xx)
             /* STM32L053 only have 2 wake pins */
@@ -68,15 +78,27 @@ void pm_set(unsigned mode)
             deep = 1;
             break;
         case STM32_PM_STOP:
-#if defined(CPU_FAM_STM32L0)
+#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
+            /* Clear Wakeup flag */
+            PWR->CR |= PWR_CR_CWUF;
             /* Clear PDDS to enter stop mode on */
             /*
              * Regarding LPSDSR, it's up to the user to configure it :
              * 0: Voltage regulator on during Deepsleep/Sleep/Low-power run mode
              * 1: Voltage regulator in low-power mode during
              *    Deepsleep/Sleep/Low-power run mode
+             * Regarding ULP, it's up to the user to configure it :
+             * 0: Internal Vref enabled during Deepsleep/Sleep/Low-power run mode
+             * 1: Disable internal voltage reference
+             *    Deepsleep/Sleep/Low-power run mode
              */
             PWR->CR &= ~(PWR_CR_PDDS);
+
+            /* Regulator in LP mode */
+            // PWR->CR |= PWR_CR_LPSDSR;
+
+            /* Enable Ultra Low Power mode*/
+            // PWR->CR |= PWR_CR_ULP;
 #else
             /* Clear PDDS and LPDS bits to enter stop mode on */
             /* deepsleep with voltage regulator on */
@@ -94,7 +116,8 @@ void pm_set(unsigned mode)
     cortexm_sleep(deep);
 
 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
-    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
+    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
+    defined(CPU_FAM_STM32L1)
     if (deep) {
         /* Re-init clock after STOP */
         stmclk_init_sysclk();
@@ -103,7 +126,8 @@ void pm_set(unsigned mode)
 }
 
 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
-    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
+    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
+    defined(CPU_FAM_STM32L1)
 void pm_off(void)
 {
     irq_disable();
diff --git a/cpu/stm32l1/Makefile.include b/cpu/stm32l1/Makefile.include
index 3d6f379e13..a61c7299f6 100644
--- a/cpu/stm32l1/Makefile.include
+++ b/cpu/stm32l1/Makefile.include
@@ -1,5 +1,7 @@
 export CPU_ARCH = cortex-m3
 export CPU_FAM  = stm32l1
 
+USEMODULE += pm_layered
+
 include $(RIOTCPU)/stm32_common/Makefile.include
 include $(RIOTMAKE)/arch/cortexm.inc.mk