From 4e1f2b5d38e3a348110477d20f06ccb005e2913f Mon Sep 17 00:00:00 2001
From: Alexandre Abadie <alexandre.abadie@inria.fr>
Date: Tue, 13 Mar 2018 11:02:07 +0100
Subject: [PATCH] cpu/stm32l1: add flashpage support

---
 cpu/stm32l1/Makefile.features  |  3 +++
 cpu/stm32l1/include/cpu_conf.h | 22 +++++++++++++++++++++-
 2 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/cpu/stm32l1/Makefile.features b/cpu/stm32l1/Makefile.features
index 8edd0b2772..5e5e8b9118 100644
--- a/cpu/stm32l1/Makefile.features
+++ b/cpu/stm32l1/Makefile.features
@@ -1 +1,4 @@
+FEATURES_PROVIDED += periph_flashpage
+FEATURES_PROVIDED += periph_flashpage_raw
+
 -include $(RIOTCPU)/stm32_common/Makefile.features
diff --git a/cpu/stm32l1/include/cpu_conf.h b/cpu/stm32l1/include/cpu_conf.h
index 09bcfab3a5..cb86a3bf53 100644
--- a/cpu/stm32l1/include/cpu_conf.h
+++ b/cpu/stm32l1/include/cpu_conf.h
@@ -72,10 +72,30 @@ extern "C" {
 #define CPU_FLASH_BASE                  FLASH_BASE
 /** @} */
 
+/**
+ * @name   Flash page configuration
+ * @{
+ */
+#if defined(CPU_MODEL_STM32L152RE) || defined(CPU_MODEL_STM32L151RC)
+#define FLASHPAGE_SIZE             (256U)
+#if defined(CPU_MODEL_STM32L152RE)
+#define FLASHPAGE_NUMOF            (2048U)    /* 512KB */
+#endif
+#if defined(CPU_MODEL_STM32L151RC)
+#define FLASHPAGE_NUMOF            (1024U)    /* 256KB */
+#endif
+#endif
+/* The minimum block size which can be written is 4B. However, the erase
+ * block is always FLASHPAGE_SIZE.
+ */
+#define FLASHPAGE_RAW_BLOCKSIZE    (4U)
+/* Writing should be always 4 bytes aligned */
+#define FLASHPAGE_RAW_ALIGNMENT    (4U)
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif
 
 #endif /* CPU_CONF_H */
 /** @} */
-/** @} */