boards/phyNODE: adapted PWM configuration
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@ -141,37 +141,24 @@ static const adc_conf_t adc_config[] = {
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/** @} */
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/**
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* @name PWM configuration
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* @brief PWM configuration
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* @{
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*/
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#define PWM_NUMOF (1U)
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#define PWM_0_EN 1
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#define PWM_MAX_CHANNELS 4
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#define PWM_MAX_VALUE 0xffff
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static const pwm_conf_t pwm_config[] = {
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{
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.ftm = FTM0,
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.chan = {
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{ .pin = GPIO_PIN(PORT_A, 4), .af = 3, .ftm_chan = 1 },
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{ .pin = GPIO_PIN(PORT_D, 4), .af = 4, .ftm_chan = 4 },
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{ .pin = GPIO_PIN(PORT_D, 6), .af = 4, .ftm_chan = 6 },
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{ .pin = GPIO_PIN(PORT_A, 1), .af = 3, .ftm_chan = 1 }
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},
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.chan_numof = 4,
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.ftm_num = 0
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}
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};
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/* PWM 0 device configuration */
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#define PWM_0_DEV FTM0
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#define PWM_0_CHANNELS 3
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#define PWM_0_CLK (48e6)
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#define PWM_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_FTM0_MASK))
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#define PWM_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_FTM0_MASK))
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/* PWM 0 pin configuration */
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#define PWM_0_CH0_GPIO GPIO_PIN(PORT_A, 4)
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#define PWM_0_CH0_FTMCHAN 1
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#define PWM_0_CH0_AF 3
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#define PWM_0_CH1_GPIO GPIO_PIN(PORT_D, 4)
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#define PWM_0_CH1_FTMCHAN 4
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#define PWM_0_CH1_AF 4
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#define PWM_0_CH2_GPIO GPIO_PIN(PORT_D, 6)
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#define PWM_0_CH2_FTMCHAN 6
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#define PWM_0_CH2_AF 4
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#define PWM_0_CH3_GPIO GPIO_PIN(PORT_A, 1)
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#define PWM_0_CH3_FTMCHAN 1
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#define PWM_0_CH3_AF 3
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#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
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/** @} */
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