Merge pull request #14131 from aabadie/pr/cpu/stmclk_cleanup

cpu/stm32: move stmclk in its own module, remove useless ifdefs
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benpicco 2020-05-25 20:42:11 +02:00 committed by GitHub
commit 4f295a439b
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7 changed files with 20 additions and 22 deletions

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@ -1,5 +1,5 @@
MODULE = cpu
DIRS = $(RIOTCPU)/cortexm_common periph vectors
DIRS = $(RIOTCPU)/cortexm_common periph stmclk vectors
include $(RIOTBASE)/Makefile.base

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@ -1,8 +1,8 @@
# All stm32 families provide pm support
USEMODULE += pm_layered
# include stm32 common periph drivers
USEMODULE += periph stm32_vectors
# include stm32 common periph drivers, clock configurations and vectors
USEMODULE += periph stm32_clk stm32_vectors
ifneq (,$(filter periph_usbdev,$(FEATURES_USED)))
USEMODULE += xtimer

14
cpu/stm32/stmclk/Makefile Normal file
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@ -0,0 +1,14 @@
MODULE = stm32_clk
SRC = stmclk_common.c
_CPU_FAM_SHORT = $(subst stm32,,$(CPU_FAM))
ifneq (,$(filter f%,$(_CPU_FAM_SHORT)))
SRC += stmclk_fx.c
else ifneq (,$(filter $(_CPU_FAM_SHORT),l0 l1))
SRC += stmclk_l0l1.c
else ifneq (,$(filter $(_CPU_FAM_SHORT),l4 wb))
SRC += stmclk_l4wb.c
endif
include $(RIOTBASE)/Makefile.base

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@ -12,17 +12,13 @@
* @{
*
* @file
* @brief Implementation of STM32 clock configuration
* @brief Implementation of STM32 clock configuration for F0/F1/F2/F3/F4/F7 families
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Vincent Dupont <vincent@otakeys.com>
* @}
*/
#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \
defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F3) || \
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32F7)
#include "cpu.h"
#include "stmclk.h"
#include "periph_conf.h"
@ -252,8 +248,3 @@ void stmclk_init_sysclk(void)
irq_restore(is);
}
#else
typedef int dont_be_pedantic;
#endif /* defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) ||
* defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F3) ||
* defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32F7) */

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@ -13,7 +13,7 @@
* @{
*
* @file
* @brief Implementation of STM32 clock configuration
* @brief Implementation of STM32 clock configuration for L0 and L1 families
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
@ -26,8 +26,6 @@
#include "periph_conf.h"
#include "periph/init.h"
#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
/* Check the source to be used for the PLL */
#if defined(CLOCK_HSI) && defined(CLOCK_HSE)
#error "Only provide one of two CLOCK_HSI/CLOCK_HSE"
@ -115,5 +113,3 @@ void stmclk_init_sysclk(void)
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) {}
}
#endif /* defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) */

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@ -13,7 +13,7 @@
* @{
*
* @file
* @brief Implementation of STM32 clock configuration
* @brief Implementation of STM32 clock configuration for L4 and WB families
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Nick van IJzendoorn <nijzendoorn@engineering-spirit.nl>
@ -27,8 +27,6 @@
#include "stmclk.h"
#include "periph_conf.h"
#if defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB)
/* make sure we have all needed information about the clock configuration */
#ifndef CLOCK_HSE
#error "Please provide CLOCK_HSE in your board's perhip_conf.h"
@ -200,4 +198,3 @@ void stmclk_init_sysclk(void)
#endif /* CLOCK_LSE */
#endif /* MODULE_PERIPH_RTT */
}
#endif