cpu/esp32: changes for RTOS SDK
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@ -205,3 +205,10 @@ void IRAM NORETURN panic_arch(void)
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UNREACHABLE();
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UNREACHABLE();
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}
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}
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void _panic_handler(uint32_t addr)
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{
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ets_printf("#! _xt_panic called from 0x%08x: powering off\n", addr);
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pm_off();
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while (1) { };
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}
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@ -168,7 +168,7 @@ typedef enum {
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*
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*
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* ESP32 integrates two 12-bit ADCs (ADC1 and ADC2) capable of measuring up to
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* ESP32 integrates two 12-bit ADCs (ADC1 and ADC2) capable of measuring up to
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* 18 analog signals in total. Most of these ADC channels are either connected
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* 18 analog signals in total. Most of these ADC channels are either connected
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* to a number of intergrated sensors like a Hall sensors, touch sensors and a
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* to a number of integrated sensors like a Hall sensors, touch sensors and a
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* temperature sensor or can be connected with certain GPIOs. Integrated
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* temperature sensor or can be connected with certain GPIOs. Integrated
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* sensors are disabled in RIOT's implementation and are not accessible. Thus,
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* sensors are disabled in RIOT's implementation and are not accessible. Thus,
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* up to 18 GPIOs, the RTC GPIOs, can be used as ADC inputs:
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* up to 18 GPIOs, the RTC GPIOs, can be used as ADC inputs:
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@ -207,7 +207,7 @@ typedef enum {
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* determines the mapping between the RIOT's ADC lines and the GPIOs.
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* determines the mapping between the RIOT's ADC lines and the GPIOs.
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*
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*
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* @note ADC_GPIOS must be defined even if there are no GPIOs that could be
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* @note ADC_GPIOS must be defined even if there are no GPIOs that could be
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* used as ADC channels on the board. In this case, an empy list hast to be
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* used as ADC channels on the board. In this case, an empty list hast to be
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* defined which just contains the curly braces.
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* defined which just contains the curly braces.
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*
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*
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* ADC_NUMOF is determined automatically from the ADC_GPIOS definition.
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* ADC_NUMOF is determined automatically from the ADC_GPIOS definition.
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@ -235,7 +235,7 @@ typedef enum {
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/** @} */
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/** @} */
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/**
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/**
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* @brief Number of ADC cahnnels that could be used at maximum
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* @brief Number of ADC channels that could be used at maximum
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*
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*
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* @note GPIO37 and GPIO38 are usually not broken out on ESP32 modules and are
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* @note GPIO37 and GPIO38 are usually not broken out on ESP32 modules and are
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* therefore not usable. The maximum number of ADC channels (ADC_NUMOF_MAX)
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* therefore not usable. The maximum number of ADC channels (ADC_NUMOF_MAX)
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@ -258,7 +258,7 @@ typedef enum {
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* determines the mapping between the RIOT's DAC lines and the GPIOs.
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* determines the mapping between the RIOT's DAC lines and the GPIOs.
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*
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*
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* @note DAC_GPIOS must be defined even if there are no GPIOs that could be
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* @note DAC_GPIOS must be defined even if there are no GPIOs that could be
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* used as DAC channels on the board. In this case, an empy list hast to be
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* used as DAC channels on the board. In this case, an empty list hast to be
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* defined which just contains the curly braces.
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* defined which just contains the curly braces.
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*
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*
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* DAC_NUMOF is determined automatically from the DAC_GPIOS definition.
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* DAC_NUMOF is determined automatically from the DAC_GPIOS definition.
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@ -270,7 +270,7 @@ typedef enum {
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*/
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*/
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/**
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/**
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* @brief Number of DAC cahnnels that could be used at maximum.
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* @brief Number of DAC channels that could be used at maximum.
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*/
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*/
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#define DAC_NUMOF_MAX 2
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#define DAC_NUMOF_MAX 2
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@ -282,7 +282,7 @@ typedef enum {
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* ESP32 has two built-in I2C interfaces.
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* ESP32 has two built-in I2C interfaces.
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*
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*
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* The board-specific configuration of the I2C interface I2C_DEV(n) requires
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* The board-specific configuration of the I2C interface I2C_DEV(n) requires
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* the defintion of
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* the definition of
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*
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*
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* I2Cn_SPEED, the bus speed,
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* I2Cn_SPEED, the bus speed,
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* I2Cn_SCL, the GPIO used as SCL signal, and
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* I2Cn_SCL, the GPIO used as SCL signal, and
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@ -325,6 +325,11 @@ typedef struct {
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gpio_t sda; /**< GPIO used as SDA pin */
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gpio_t sda; /**< GPIO used as SDA pin */
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} i2c_conf_t;
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} i2c_conf_t;
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/**
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* @brief Maximum number of I2C interfaces that can be used by board definitions
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*/
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#define I2C_NUMOF_MAX (2)
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#define PERIPH_I2C_NEED_READ_REG /**< i2c_read_reg required */
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#define PERIPH_I2C_NEED_READ_REG /**< i2c_read_reg required */
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#define PERIPH_I2C_NEED_READ_REGS /**< i2c_read_regs required */
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#define PERIPH_I2C_NEED_READ_REGS /**< i2c_read_regs required */
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#define PERIPH_I2C_NEED_WRITE_REG /**< i2c_write_reg required */
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#define PERIPH_I2C_NEED_WRITE_REG /**< i2c_write_reg required */
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@ -333,7 +338,6 @@ typedef struct {
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/**
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/**
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* @name PWM configuration
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* @name PWM configuration
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* @{
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*
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*
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* PWM implementation uses ESP32's high-speed MCPWM modules. ESP32 has 2 such
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* PWM implementation uses ESP32's high-speed MCPWM modules. ESP32 has 2 such
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* modules, each with up to 6 channels (PWM_CHANNEL_NUM_DEV_MAX). Thus, the
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* modules, each with up to 6 channels (PWM_CHANNEL_NUM_DEV_MAX). Thus, the
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@ -355,6 +359,8 @@ typedef struct {
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* @note As long as the GPIOs listed in PWM0_GPIOS and PMW1_GPIOS are not
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* @note As long as the GPIOs listed in PWM0_GPIOS and PMW1_GPIOS are not
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* initialized as PWM channels with the *pwm_init* function, they can be used
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* initialized as PWM channels with the *pwm_init* function, they can be used
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* other purposes.
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* other purposes.
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*
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* @{
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*/
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*/
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/**
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/**
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@ -388,7 +394,7 @@ typedef struct {
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* device driver doesn't support it.
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* device driver doesn't support it.
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*
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*
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* The board-specific configuration of the SPI interface SPI_DEV(n) requires
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* The board-specific configuration of the SPI interface SPI_DEV(n) requires
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* the defintion of
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* the definition of
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*
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*
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* - SPIn_CTRL, the SPI controller which is used for the interface (VSPI or HSPI),
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* - SPIn_CTRL, the SPI controller which is used for the interface (VSPI or HSPI),
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* - SPIn_SCK, the GPIO used as clock signal
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* - SPIn_SCK, the GPIO used as clock signal
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@ -402,6 +408,8 @@ typedef struct {
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*
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*
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* SPI_NUMOF is determined automatically from the board-specific peripheral
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* SPI_NUMOF is determined automatically from the board-specific peripheral
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* definitions of SPIn_*.
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* definitions of SPIn_*.
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*
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* @{
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*/
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*/
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/**
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/**
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@ -423,6 +431,11 @@ typedef struct {
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gpio_t cs; /**< GPIO used as CS0 pin */
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gpio_t cs; /**< GPIO used as CS0 pin */
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} spi_conf_t;
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} spi_conf_t;
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/**
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* @brief Maximum number of SPI interfaces that can be used by board definitions
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*/
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#define SPI_NUMOF_MAX 2
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE /**< requires function spi_transfer_byte */
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE /**< requires function spi_transfer_byte */
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#define PERIPH_SPI_NEEDS_TRANSFER_REG /**< requires function spi_transfer_reg */
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#define PERIPH_SPI_NEEDS_TRANSFER_REG /**< requires function spi_transfer_reg */
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS /**< requires function spi_transfer_regs */
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS /**< requires function spi_transfer_regs */
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