boards/qn9080dk: Add SPI NOR flash definition

The QN9080-DK board has a 2 Mbit MX25R2035F SPI NOR flash connected to
SPI0. This patch adds the flash definition to the board.
This commit is contained in:
iosabi 2021-01-25 04:03:23 +01:00
parent cde5d91018
commit 4fb4f03252
3 changed files with 50 additions and 0 deletions

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@ -2,3 +2,8 @@ ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
USEMODULE += mma8x5x
endif
# For MX25R2035F on SPI_DEV(0).
ifneq (,$(filter mtd,$(USEMODULE)))
USEMODULE += mtd_spi_nor
endif

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@ -21,8 +21,44 @@
#include "cpu.h"
#include "board.h"
#include "mtd.h"
#include "mtd_spi_nor.h"
#include "timex.h"
#include "periph/gpio.h"
#ifdef MODULE_MTD
/* MX25R2035F */
static const mtd_spi_nor_params_t _mtd_nor_params = {
.opcode = &mtd_spi_nor_opcode_default,
.wait_chip_erase = 15000LU * US_PER_MS,
.wait_64k_erase = 3500LU * US_PER_MS,
.wait_32k_erase = 1750LU * US_PER_MS,
.wait_sector_erase = 240LU * US_PER_MS,
.wait_chip_wake_up = 1LU * US_PER_MS,
.clk = CLOCK_CORECLOCK, /* Max fR and fC is 33 MHz, max core is 32 MHz. */
.flag = SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_32K | SPI_NOR_F_SECT_64K,
.spi = SPI_DEV(0),
.mode = SPI_MODE_0,
.cs = SPI_HWCS(0), /* GPIO(PORT_A, 3) is used for HWCS(0) on FC2 */
.wp = GPIO_UNDEF,
.hold = GPIO_UNDEF,
.addr_width = 3, /* 24-bit addresses */
};
static mtd_spi_nor_t mtd_nor_dev = {
.base = {
.driver = &mtd_spi_nor_driver,
.page_size = 256,
.pages_per_sector = 16, /* 4 KiB sectors */
.sector_count = 64,
},
.params = &_mtd_nor_params,
};
mtd_dev_t *mtd0 = (mtd_dev_t *)&mtd_nor_dev;
#endif /* MODULE_MTD */
void board_init(void)
{
/* Initialize LEDs and Buttons. */

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@ -20,6 +20,7 @@
#define BOARD_H
#include "cpu.h"
#include "mtd.h"
#include "periph_conf.h"
#include "periph_cpu.h"
@ -68,6 +69,14 @@ extern "C" {
#define MMA8X5X_PARAM_TYPE (MMA8X5X_TYPE_MMA8652)
/** @} */
/**
* @name MTD configuration
* @{
*/
extern mtd_dev_t *mtd0;
#define MTD_0 mtd0
/** @} */
/**
* @brief Initialize board specific hardware
*/