riot-ci/RIOT
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

cpu/stm32: add uart support for stm32mp1

Browse Source 
stm32mp1 family uart driver is the same than for other stm32 families.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
This commit is contained in:
Gilles DOFFE 2020-08-03 00:45:59 +02:00
parent ec97eb8447
commit 504fba61b8
2 changed files with 19 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
cpu/stm32/include/periph_cpu.h
View File

@ -684,7 +684,7 @@ typedef struct {
#endif #endif
#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L4) || \ #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L4) || \
defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32G4) || \ defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32G4) || \
defined(CPU_FAM_STM32L5) defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32MP1)
uart_type_t type; /**< hardware module type (USART or LPUART) */ uart_type_t type; /**< hardware module type (USART or LPUART) */
uint32_t clk_src; /**< clock source used for UART */ uint32_t clk_src; /**< clock source used for UART */
#endif #endif

19
cpu/stm32/periph/uart.c
View File

@ -45,7 +45,7 @@
#elif defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32L0) || \ #elif defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32L0) || \
defined(CPU_FAM_STM32F3) || defined(CPU_FAM_STM32L4) || \ defined(CPU_FAM_STM32F3) || defined(CPU_FAM_STM32L4) || \
defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32F7) || \ defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32F7) || \
defined(CPU_FAM_STM32G4) defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32MP1)
#define ISR_REG ISR #define ISR_REG ISR
#define ISR_TXE USART_ISR_TXE #define ISR_TXE USART_ISR_TXE
#define ISR_RXNE USART_ISR_RXNE #define ISR_RXNE USART_ISR_RXNE
@ -297,7 +297,24 @@ static inline void uart_init_usart(uart_t uart, uint32_t baudrate)
uint32_t clk; uint32_t clk;
/* calculate and apply baudrate */ /* calculate and apply baudrate */
#ifdef CPU_FAM_STM32MP1
RCC->UART35CKSELR = uart_config[uart].clk_src;
switch (uart_config[uart].clk_src) {
case RCC_UART35CKSELR_UART35SRC_2: /* HSI */
clk = CLOCK_HSI;
break;
case RCC_UART35CKSELR_UART35SRC_4: /* HSE */
clk = CLOCK_HSE;
break;
default: /* return */
return;
}
clk /= baudrate;
#else
clk = periph_apb_clk(uart_config[uart].bus) / baudrate; clk = periph_apb_clk(uart_config[uart].bus) / baudrate;
#endif
mantissa = (uint16_t)(clk / 16); mantissa = (uint16_t)(clk / 16);
fraction = (uint8_t)(clk - (mantissa * 16)); fraction = (uint8_t)(clk - (mantissa * 16));
dev(uart)->BRR = ((mantissa & 0x0fff) << 4) | (fraction & 0x0f); dev(uart)->BRR = ((mantissa & 0x0fff) << 4) | (fraction & 0x0f);