cpu: stm32f1/2/4: unify periph/pm support
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@ -44,6 +44,13 @@ extern "C" {
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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/**
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* @brief Number of usable low power modes
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*/
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#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) || defined(DOXYGEN)
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#define PM_NUM_MODES (2U)
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#endif
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/**
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* @brief Available peripheral buses
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*/
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@ -1,5 +1,6 @@
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/*
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* Copyright (C) 2016 Kaspar Schleiser <kaspar@schleiser.de>
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* 2015 Freie Universität Berlin
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* 2015 Engineering-Spirit
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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@ -8,7 +9,7 @@
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*/
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/**
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* @ingroup cpu_stm32f1
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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@ -16,10 +17,12 @@
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*
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* @author Nick v. IJzendoorn <nijzndoorn@engineering-spirit.nl>
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* @author Kaspar Schleiser <kaspar@schleiser.de>
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* @author Fabian Nack <nack@inf.fu-berlin.de>
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*
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* @}
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*/
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#include "irq.h"
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#include "periph/pm.h"
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#define ENABLE_DEBUG (1)
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@ -27,10 +30,17 @@
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void pm_set(unsigned mode)
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{
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/* I just copied it from stm32f1/2/4, but I suppose it would work for the
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* others... /KS */
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#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4)
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switch (mode) {
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case 0: /* STM Sleep mode */
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/* Reset SLEEPDEEP bit of system control block */
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SCB->SCR &= ~(SCB_SCR_SLEEPDEEP_Msk);
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case 0:
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/* Set PDDS to enter standby mode on deepsleep and clear flags */
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PWR->CR |= (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF);
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/* Enable WKUP pin to use for wakeup from standby mode */
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PWR->CSR |= PWR_CSR_EWUP;
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/* Set SLEEPDEEP bit of system control block */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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break;
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case 1: /* STM Stop mode */
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/* Clear PDDS and LPDS bits to enter stop mode on */
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@ -39,9 +49,12 @@ void pm_set(unsigned mode)
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/* Set SLEEPDEEP bit of system control block */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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break;
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default:
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DEBUG("pm: invalid power mode selected.\n");
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case 2: /* STM Sleep mode */
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/* Reset SLEEPDEEP bit of system control block */
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SCB->SCR &= ~(SCB_SCR_SLEEPDEEP_Msk);
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break;
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}
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#endif
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/* Executes a device DSB (Data Synchronization Barrier) */
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__DSB();
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@ -49,15 +62,10 @@ void pm_set(unsigned mode)
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__WFI();
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}
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#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4)
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void pm_off(void)
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{
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/* Set PDDS to enter standby mode on deepsleep and clear flags */
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PWR->CR |= (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF);
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/* Enable WKUP pin to use for wakeup from standby mode */
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PWR->CSR |= PWR_CSR_EWUP;
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/* Set SLEEPDEEP bit of system control block */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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__DSB();
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__WFI();
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irq_disable();
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pm_set(0);
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}
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#endif
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@ -1 +1 @@
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FEATURE_PROVIDED += periph_pm
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FEATURES_PROVIDED += periph_pm
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@ -1,5 +1,7 @@
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export CPU_ARCH = cortex-m3
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export CPU_FAM = stm32f1
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USEMODULE += pm_layered
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include $(RIOTCPU)/stm32_common/Makefile.include
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include $(RIOTCPU)/Makefile.include.cortexm_common
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1
cpu/stm32f2/Makefile.features
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1
cpu/stm32f2/Makefile.features
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@ -0,0 +1 @@
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FEATURES_PROVIDED += periph_pm
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@ -1,5 +1,7 @@
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export CPU_ARCH = cortex-m3
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export CPU_FAM = stm32f2
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USEMODULE += pm_layered
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include $(RIOTCPU)/stm32_common/Makefile.include
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include $(RIOTCPU)/Makefile.include.cortexm_common
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1
cpu/stm32f4/Makefile.features
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1
cpu/stm32f4/Makefile.features
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@ -0,0 +1 @@
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FEATURES_PROVIDED += periph_pm
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@ -1,5 +1,7 @@
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export CPU_ARCH = cortex-m4f
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export CPU_FAM = stm32f4
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USEMODULE += pm_layered
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include $(RIOTCPU)/stm32_common/Makefile.include
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include $(RIOTCPU)/Makefile.include.cortexm_common
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