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cpu: stm32f1/2/4: unify periph/pm support

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This commit is contained in:
Kaspar Schleiser 2017-01-09 23:33:16 +01:00
parent a8c5fcc5eb
commit 5798beca64
8 changed files with 39 additions and 16 deletions
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7
cpu/stm32_common/include/periph_cpu_common.h
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@ -44,6 +44,13 @@ extern "C" {
#define PERIPH_SPI_NEEDS_TRANSFER_REGS #define PERIPH_SPI_NEEDS_TRANSFER_REGS
/** @} */ /** @} */
/**
* @brief Number of usable low power modes
*/
#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) || defined(DOXYGEN)
#define PM_NUM_MODES (2U)
#endif
/** /**
* @brief Available peripheral buses * @brief Available peripheral buses
*/ */

38
cpu/stm32f1/periph/pm.c → cpu/stm32_common/periph/pm.c
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@ -1,5 +1,6 @@
/* /*
* Copyright (C) 2016 Kaspar Schleiser <kaspar@schleiser.de> * Copyright (C) 2016 Kaspar Schleiser <kaspar@schleiser.de>
* 2015 Freie Universität Berlin
* 2015 Engineering-Spirit * 2015 Engineering-Spirit
* *
* This file is subject to the terms and conditions of the GNU Lesser * This file is subject to the terms and conditions of the GNU Lesser
@ -8,7 +9,7 @@
*/ */
/** /**
* @ingroup cpu_stm32f1 * @ingroup cpu_stm32
* @{ * @{
* *
* @file * @file
@ -16,10 +17,12 @@
* *
* @author Nick v. IJzendoorn <nijzndoorn@engineering-spirit.nl> * @author Nick v. IJzendoorn <nijzndoorn@engineering-spirit.nl>
* @author Kaspar Schleiser <kaspar@schleiser.de> * @author Kaspar Schleiser <kaspar@schleiser.de>
* @author Fabian Nack <nack@inf.fu-berlin.de>
* *
* @} * @}
*/ */
#include "irq.h"
#include "periph/pm.h" #include "periph/pm.h"
#define ENABLE_DEBUG (1) #define ENABLE_DEBUG (1)
@ -27,10 +30,17 @@
void pm_set(unsigned mode) void pm_set(unsigned mode)
{ {
/* I just copied it from stm32f1/2/4, but I suppose it would work for the
* others... /KS */
#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4)
switch (mode) { switch (mode) {
case 0: /* STM Sleep mode */ case 0:
/* Reset SLEEPDEEP bit of system control block */ /* Set PDDS to enter standby mode on deepsleep and clear flags */
SCB->SCR &= ~(SCB_SCR_SLEEPDEEP_Msk); PWR->CR |= (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF);
/* Enable WKUP pin to use for wakeup from standby mode */
PWR->CSR |= PWR_CSR_EWUP;
/* Set SLEEPDEEP bit of system control block */
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
break; break;
case 1: /* STM Stop mode */ case 1: /* STM Stop mode */
/* Clear PDDS and LPDS bits to enter stop mode on */ /* Clear PDDS and LPDS bits to enter stop mode on */
@ -39,9 +49,12 @@ void pm_set(unsigned mode)
/* Set SLEEPDEEP bit of system control block */ /* Set SLEEPDEEP bit of system control block */
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
break; break;
default: case 2: /* STM Sleep mode */
DEBUG("pm: invalid power mode selected.\n"); /* Reset SLEEPDEEP bit of system control block */
SCB->SCR &= ~(SCB_SCR_SLEEPDEEP_Msk);
break;
} }
#endif
/* Executes a device DSB (Data Synchronization Barrier) */ /* Executes a device DSB (Data Synchronization Barrier) */
__DSB(); __DSB();
@ -49,15 +62,10 @@ void pm_set(unsigned mode)
__WFI(); __WFI();
} }
#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4)
void pm_off(void) void pm_off(void)
{ {
/* Set PDDS to enter standby mode on deepsleep and clear flags */ irq_disable();
PWR->CR |= (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF); pm_set(0);
/* Enable WKUP pin to use for wakeup from standby mode */
PWR->CSR |= PWR_CSR_EWUP;
/* Set SLEEPDEEP bit of system control block */
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
__DSB();
__WFI();
} }
#endif

2
cpu/stm32f1/Makefile.features
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@ -1 +1 @@
FEATURE_PROVIDED += periph_pm FEATURES_PROVIDED += periph_pm

2
cpu/stm32f1/Makefile.include
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@ -1,5 +1,7 @@
export CPU_ARCH = cortex-m3 export CPU_ARCH = cortex-m3
export CPU_FAM = stm32f1 export CPU_FAM = stm32f1
USEMODULE += pm_layered
include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTCPU)/Makefile.include.cortexm_common include $(RIOTCPU)/Makefile.include.cortexm_common

1
cpu/stm32f2/Makefile.features Normal file
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@ -0,0 +1 @@
FEATURES_PROVIDED += periph_pm

2
cpu/stm32f2/Makefile.include
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@ -1,5 +1,7 @@
export CPU_ARCH = cortex-m3 export CPU_ARCH = cortex-m3
export CPU_FAM = stm32f2 export CPU_FAM = stm32f2
USEMODULE += pm_layered
include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTCPU)/Makefile.include.cortexm_common include $(RIOTCPU)/Makefile.include.cortexm_common

1
cpu/stm32f4/Makefile.features Normal file
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@ -0,0 +1 @@
FEATURES_PROVIDED += periph_pm

2
cpu/stm32f4/Makefile.include
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@ -1,5 +1,7 @@
export CPU_ARCH = cortex-m4f export CPU_ARCH = cortex-m4f
export CPU_FAM = stm32f4 export CPU_FAM = stm32f4
USEMODULE += pm_layered
include $(RIOTCPU)/stm32_common/Makefile.include include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTCPU)/Makefile.include.cortexm_common include $(RIOTCPU)/Makefile.include.cortexm_common