Merge pull request #15712 from nandojve/split-mega-into-mega-avr8

cpu/atmega_common: Split into atmega_common and avr8_common

boards/arduino-leonardo/board.c

@@ -35,7 +35,7 @@ void board_init(void)
     PRR1 |= 1<<PRUSB;
 
     atmega_set_prescaler(CPU_ATMEGA_CLK_SCALE_INIT);
-    atmega_stdio_init();
+    avr8_stdio_init();
     cpu_init();
     led_init();
     irq_enable();

cpu/atmega_common/Kconfig

@@ -4,15 +4,6 @@
 # General Public License v2.1. See the file LICENSE in the top level
 # directory for more details.
 #
-config CPU_ARCH_AVR8
-    bool
-    select HAS_ARCH_8BIT
-    select HAS_ARCH_AVR8
-
-config CPU_CORE_AVR
-    bool
-    select CPU_ARCH_AVR8
-
 config CPU_COMMON_ATMEGA
     bool
     select CPU_CORE_AVR
@@ -34,21 +25,10 @@ config CPU_FAM_ATMEGA128
     select CPU_CORE_AVR
 
 ## Common CPU symbols
-config CPU_ARCH
-    default "avr8" if CPU_ARCH_AVR8
-
-config CPU_CORE
-    default "avr" if CPU_CORE_AVR
-
 config CPU_FAM
     default "atmega128" if CPU_FAM_ATMEGA128
 
 ## Declaration of specific features
-config HAS_ARCH_AVR8
-    bool
-    help
-        Indicates that the current architecture is Atmel AVR8.
-
 config HAS_ATMEGA_PCINT0
     bool
     help
@@ -72,3 +52,5 @@ config HAS_ATMEGA_PCINT3
 config ERROR_MODULES_CONFLICT
     default "On ATmega, the RTC and RTT use to the same hardware timer." if MODULE_PERIPH_RTC && MODULE_PERIPH_RTT
     depends on CPU_COMMON_ATMEGA
+
+source "$(RIOTCPU)/avr8_common/Kconfig"

cpu/atmega_common/Makefile

@@ -2,6 +2,6 @@
 MODULE = atmega_common
 
 # add a list of subdirectories, that should also be build
-DIRS = periph avr_libc_extra
+DIRS = periph $(RIOTCPU)/avr8_common/
 
 include $(RIOTBASE)/Makefile.base

cpu/atmega_common/Makefile.dep

@@ -1,22 +1,9 @@
-# avr libc needs some RIOT-specific support code
-USEMODULE += avr_libc_extra
-
 # tell the build system to build the atmega common files
 USEMODULE += atmega_common
 
 # peripheral drivers are linked into the final binary
 USEMODULE += atmega_common_periph
 
-# The AVR-libc provides no thread safe malloc implementation and has no hooks
-# to inject. Use malloc_thread_safe to link calls to malloc to safe wrappers
-# instead.
-USEMODULE += malloc_thread_safe
-
-# the atmel port uses stdio_uart by default
-ifeq (,$(filter stdio_% slipdev_stdio,$(USEMODULE)))
-  USEMODULE += stdio_uart
-endif
-
 # expand atmega_pcint module
 ifneq (,$(filter atmega_pcint,$(USEMODULE)))
   USEMODULE += atmega_pcint0
@@ -42,7 +29,4 @@ ifneq (,$(filter atmega_pcint3,$(USEMODULE)))
   FEATURES_REQUIRED += atmega_pcint3
 endif
 
-# static C++ constructors need guards for thread safe initialization
+include $(RIOTCPU)/avr8_common/Makefile.dep
-ifneq (,$(filter cpp,$(FEATURES_USED)))
-  USEMODULE += cxx_ctor_guards
-endif

cpu/atmega_common/Makefile.features

@@ -1,7 +1,9 @@
-FEATURES_PROVIDED += arch_8bit
+include $(RIOTCPU)/avr8_common/Makefile.features
-FEATURES_PROVIDED += arch_avr8
+
+# common feature are defined in avr8_common/Makefile.features
+# Only add Additional features
+
 FEATURES_PROVIDED += atmega_pcint0
-FEATURES_PROVIDED += cpp
 FEATURES_PROVIDED += periph_cpuid
 FEATURES_PROVIDED += periph_eeprom
 FEATURES_PROVIDED += periph_gpio periph_gpio_irq

cpu/atmega_common/Makefile.include

@@ -1,9 +1,8 @@
 # include module specific includes
-INCLUDES += -I$(RIOTCPU)/atmega_common/include \
+INCLUDES += -I$(RIOTCPU)/atmega_common/include
-            -isystem$(RIOTCPU)/atmega_common/avr_libc_extra/include \
-            -isystem$(RIOTCPU)/atmega_common/avr_libc_extra/include/vendor
 
 PSEUDOMODULES += atmega_pcint
 PSEUDOMODULES += atmega_pcint%
 
-include $(RIOTMAKE)/arch/atmega.inc.mk
+# CPU depends on the avr8 common module, so include it
+include $(RIOTCPU)/avr8_common/Makefile.include

cpu/atmega_common/atmega_cpu.c

@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
+ *               2017 RWTH Aachen, Josua Arndt
+ *               2018 Matthew Blue
+ *               2021 Gerson Fernando Budke
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     cpu_atmega_common
+ * @{
+ *
+ * @file
+ * @brief       Implementation of the CPU initialization
+ *
+ * @author      Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
+ * @author      Steffen Robertz <steffen.robertz@rwth-aachen.de>
+ * @author      Josua Arndt <jarndt@ias.rwth-aachen.de>
+ * @author      Matthew Blue <matthew.blue.neuro@gmail.com>
+ * @author      Francisco Acosta <francisco.acosta@inria.fr>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
+ *
+ * @}
+ */
+
+#include <avr/pgmspace.h>
+
+#include "cpu.h"
+#include "panic.h"
+
+#define ENABLE_DEBUG 0
+#include "debug.h"
+
+extern uint8_t mcusr_mirror;
+extern uint8_t soft_rst;
+
+void avr8_reset_cause(void)
+{
+    if (mcusr_mirror & (1 << PORF)) {
+        DEBUG("Power-on reset.\n");
+    }
+    if (mcusr_mirror & (1 << EXTRF)) {
+        DEBUG("External reset!\n");
+    }
+    if (mcusr_mirror & (1 << BORF)) {
+        DEBUG("Brownout reset!\n");
+    }
+    if (mcusr_mirror & (1 << WDRF)) {
+        if (soft_rst & 0xAA) {
+            DEBUG("Software reset!\n");
+        } else {
+            DEBUG("Watchdog reset!\n");
+        }
+    }
+#if !defined (CPU_ATMEGA328P)
+    if (mcusr_mirror & (1 << JTRF)) {
+        DEBUG("JTAG reset!\n");
+    }
+#endif
+}
+
+/* This is a vector which is aliased to __vector_default,
+ * the vector executed when an ISR fires with no accompanying
+ * ISR handler. This may be used along with the ISR() macro to
+ * create a catch-all for undefined but used ISRs for debugging
+ * purposes.
+ * SCIRQS – Symbol Counter Interrupt Status Register
+ * BATMON – Battery Monitor Control and Status Register
+ * IRQ_STATUS /1 – Transceiver Interrupt Status Register
+ * EIFR – External Interrupt Flag Register
+ * PCIFR – Pin Change Interrupt Flag Register
+ */
+ISR(BADISR_vect)
+{
+    avr8_reset_cause();
+
+#if defined (CPU_ATMEGA256RFR2)
+    printf("IRQ_STATUS %#02x\nIRQ_STATUS1 %#02x\n",
+            (unsigned int)IRQ_STATUS, (unsigned int)IRQ_STATUS1);
+
+    printf("SCIRQS %#02x\nBATMON %#02x\n", (unsigned int)SCIRQS, (unsigned int)BATMON);
+
+    printf("EIFR %#02x\nPCIFR %#02x\n", (unsigned int)EIFR, (unsigned int)PCIFR);
+#endif
+#ifdef LED_PANIC
+    /* Use LED light to signal ERROR. */
+    LED_PANIC;
+#endif
+
+    core_panic(PANIC_GENERAL_ERROR, PSTR("FATAL ERROR: BADISR_vect called, unprocessed Interrupt.\n"
+                  "STOP Execution.\n"));
+}
+
+#if defined(CPU_ATMEGA128RFA1) || defined (CPU_ATMEGA256RFR2)
+ISR(BAT_LOW_vect, ISR_BLOCK)
+{
+    avr8_enter_isr();
+    DEBUG("BAT_LOW\n");
+    avr8_exit_isr();
+}
+#endif

cpu/atmega_common/include/cpu_clock.h

@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
+ *               2014 Freie Universität Berlin, Hinnerk van Bruinehsen
+ *               2018 RWTH Aachen, Josua Arndt <jarndt@ias.rwth-aachen.de>
+ *               2021 Gerson Fernando Budke <nandojve@gmail.com>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     cpu_atmega_common
+ * @brief       Common clock support for ATmega family based micro-controllers
+ * @{
+ *
+ * @file
+ * @brief       Basic definitions for the ATmega common clock
+ *
+ * When ever you want to do something hardware related, that is accessing MCUs registers directly,
+ * just include this file. It will then make sure that the MCU specific headers are included.
+ *
+ * @author      Stefan Pfeiffer <stefan.pfeiffer@fu-berlin.de>
+ * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
+ * @author      Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
+ * @author      Kaspar Schleiser <kaspar@schleiser.de>
+ * @author      Josua Arndt <jarndt@ias.rwth-aachen.de>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
+ *
+ */
+
+#ifndef CPU_CLOCK_H
+#define CPU_CLOCK_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   ATmega system clock prescaler settings
+ *
+ * Some CPUs may not support the highest prescaler settings
+ */
+enum {
+    CPU_ATMEGA_CLK_SCALE_DIV1   = 0,
+    CPU_ATMEGA_CLK_SCALE_DIV2   = 1,
+    CPU_ATMEGA_CLK_SCALE_DIV4   = 2,
+    CPU_ATMEGA_CLK_SCALE_DIV8   = 3,
+    CPU_ATMEGA_CLK_SCALE_DIV16  = 4,
+    CPU_ATMEGA_CLK_SCALE_DIV32  = 5,
+    CPU_ATMEGA_CLK_SCALE_DIV64  = 6,
+    CPU_ATMEGA_CLK_SCALE_DIV128 = 7,
+    CPU_ATMEGA_CLK_SCALE_DIV256 = 8,
+    CPU_ATMEGA_CLK_SCALE_DIV512 = 9,
+};
+
+/**
+ * @brief   Initializes system clock prescaler
+ */
+static inline void atmega_set_prescaler(uint8_t clk_scale)
+{
+    /* Enable clock change */
+    /* Must be assignment to set all other bits to zero, see datasheet */
+    CLKPR = (1 << CLKPCE);
+
+    /* Write clock within 4 cycles */
+    CLKPR = clk_scale;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CPU_CLOCK_H */
+/** @} */

cpu/atmega_common/periph/gpio.c

@@ -371,16 +371,16 @@ void gpio_irq_disable(gpio_t pin)
 
 static inline void irq_handler(uint8_t int_num)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
     config[int_num].cb(config[int_num].arg);
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 
 #ifdef ENABLE_PCINT
 /* inline function that is used by the PCINT ISR */
 static inline void pcint_handler(uint8_t bank, uint8_t enabled_pcints)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
     /* Find right item */
     uint8_t idx = 0;
 
@@ -410,7 +410,7 @@ static inline void pcint_handler(uint8_t bank, uint8_t enabled_pcints)
         idx++;
     }
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 #ifdef MODULE_ATMEGA_PCINT0
 ISR(PCINT0_vect, ISR_BLOCK)

cpu/atmega_common/periph/rtc.c

@@ -34,7 +34,7 @@ static void *alarm_cb_arg;
 /* will be called every second */
 ISR(TIMER2_OVF_vect)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     isr_flag = !isr_flag;
 
@@ -46,7 +46,7 @@ ISR(TIMER2_OVF_vect)
         alarm_cb(alarm_cb_arg);
     }
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 
 void rtc_init(void)

cpu/atmega_common/periph/rtt.c

@@ -447,18 +447,18 @@ void rtt_poweroff(void)
 #if RTT_BACKEND_SC
 ISR(SCNT_OVFL_vect)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
     /* Execute callback */
     if (rtt_state.overflow_cb != NULL) {
         rtt_state.overflow_cb(rtt_state.overflow_arg);
     }
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 #else
 ISR(TIMER2_OVF_vect)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     ext_cnt++;
 
@@ -479,7 +479,7 @@ ISR(TIMER2_OVF_vect)
         }
     }
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 #endif
 
@@ -489,7 +489,7 @@ ISR(SCNT_CMP2_vect)
 ISR(TIMER2_COMPA_vect)
 #endif
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
     /* Disable alarm interrupt */
 #if RTT_BACKEND_SC
     SCIRQM &= ~(1 << IRQMCP2);
@@ -505,5 +505,5 @@ ISR(TIMER2_COMPA_vect)
         cb(rtt_state.alarm_arg);
     }
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }

cpu/atmega_common/periph/timer.c

@@ -277,7 +277,7 @@ static inline void _isr(tim_t tim, int chan)
     DEBUG_TIMER_PORT |= (1 << DEBUG_TIMER_PIN);
 #endif
 
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     if (is_oneshot(tim, chan)) {
         *ctx[tim].mask &= ~(1 << (chan + OCIE1A));
@@ -288,7 +288,7 @@ static inline void _isr(tim_t tim, int chan)
     DEBUG_TIMER_PORT &= ~(1 << DEBUG_TIMER_PIN);
 #endif
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 #endif
 

cpu/atmega_common/periph/uart.c

@@ -122,7 +122,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
     }
 
     uint16_t count = UINT16_MAX;
-    while (atmega_is_uart_tx_pending() && count--) {}
+    while (avr8_is_uart_tx_pending() && count--) {}
 
     /* register interrupt context */
     isr_ctx[uart].rx_cb = rx_cb;
@@ -174,7 +174,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
         /* start of TX won't finish until no data in UDRn and transmit shift
            register is empty */
         unsigned long state = irq_disable();
-        atmega_state |= ATMEGA_STATE_FLAG_UART_TX(uart);
+        avr8_state |= AVR8_STATE_FLAG_UART_TX(uart);
         irq_restore(state);
         dev[uart]->DR = data[i];
     }
@@ -194,22 +194,22 @@ void uart_poweroff(uart_t uart)
 
 static inline void _rx_isr_handler(int num)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     isr_ctx[num].rx_cb(isr_ctx[num].arg, dev[num]->DR);
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 
 static inline void _tx_isr_handler(int num)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     /* entire frame in the Transmit Shift Register has been shifted out and
        there are no new data currently present in the transmit buffer */
-    atmega_state &= ~ATMEGA_STATE_FLAG_UART_TX(num);
+    avr8_state &= ~AVR8_STATE_FLAG_UART_TX(num);
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 
 

cpu/avr8_common/Kconfig

@@ -0,0 +1,28 @@
+# Copyright (c) 2020 HAW Hamburg
+#               2021 Gerson Fernando Budke
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+config CPU_ARCH_AVR8
+    bool
+    select HAS_ARCH_8BIT
+    select HAS_ARCH_AVR8
+
+config CPU_CORE_AVR
+    bool
+    select CPU_ARCH_AVR8
+
+## Common CPU symbols
+config CPU_ARCH
+    default "avr8" if CPU_ARCH_AVR8
+
+config CPU_CORE
+    default "avr" if CPU_CORE_AVR
+
+## Declaration of specific features
+config HAS_ARCH_AVR8
+    bool
+    help
+        Indicates that the current architecture is Atmel AVR8.

cpu/avr8_common/Makefile

@@ -0,0 +1,7 @@
+# define the module that is build (not strictly necessary)
+MODULE = avr8_common
+
+# add a list of subdirectories, that should also be build
+DIRS = avr_libc_extra
+
+include $(RIOTBASE)/Makefile.base

cpu/avr8_common/Makefile.dep

@@ -0,0 +1,20 @@
+# avr libc needs some RIOT-specific support code
+USEMODULE += avr_libc_extra
+
+# tell the build system to build the avr8 common files
+USEMODULE += avr8_common
+
+# The AVR-libc provides no thread safe malloc implementation and has no hooks
+# to inject. Use malloc_thread_safe to link calls to malloc to safe wrappers
+# instead.
+USEMODULE += malloc_thread_safe
+
+# the atmel port uses stdio_uart by default
+ifeq (,$(filter stdio_% slipdev_stdio,$(USEMODULE)))
+  USEMODULE += stdio_uart
+endif
+
+# static C++ constructors need guards for thread safe initialization
+ifneq (,$(filter cpp,$(FEATURES_USED)))
+  USEMODULE += cxx_ctor_guards
+endif

cpu/avr8_common/Makefile.features

@@ -0,0 +1,3 @@
+FEATURES_PROVIDED += arch_8bit
+FEATURES_PROVIDED += arch_avr8
+FEATURES_PROVIDED += cpp

cpu/avr8_common/Makefile.include

@@ -0,0 +1,6 @@
+# include module specific includes
+INCLUDES += -I$(RIOTCPU)/avr8_common/include \
+            -isystem$(RIOTCPU)/avr8_common/avr_libc_extra/include \
+            -isystem$(RIOTCPU)/avr8_common/avr_libc_extra/include/vendor
+
+include $(RIOTMAKE)/arch/atmega.inc.mk

cpu/avr8_common/avr8_cpu.c

@@ -2,6 +2,7 @@
  * Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
  *               2017 RWTH Aachen, Josua Arndt
  *               2018 Matthew Blue
+ *               2021 Gerson Fernando Budke
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -9,7 +10,7 @@
  */
 
 /**
- * @ingroup     cpu_atmega_common
+ * @ingroup     cpu_avr8_common
  * @{
  *
  * @file
@@ -20,7 +21,8 @@
  * @author      Josua Arndt <jarndt@ias.rwth-aachen.de>
  * @author      Matthew Blue <matthew.blue.neuro@gmail.com>
  * @author      Francisco Acosta <francisco.acosta@inria.fr>
-
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
+ *
  * @}
  */
 
@@ -58,7 +60,8 @@
 */
 uint8_t mcusr_mirror __attribute__((section(".noinit")));
 uint8_t soft_rst __attribute__((section(".noinit")));
-uint8_t atmega_state = 0;
+uint8_t avr8_state = 0;
+
 void get_mcusr(void) __attribute__((naked, section(".init0"), used));
 
 void get_mcusr(void)
@@ -76,41 +79,16 @@ void get_mcusr(void)
 #endif
 }
 
-void _reset_cause(void)
-{
-    if (mcusr_mirror & (1 << PORF)) {
-        DEBUG("Power-on reset.\n");
-    }
-    if (mcusr_mirror & (1 << EXTRF)) {
-        DEBUG("External reset!\n");
-    }
-    if (mcusr_mirror & (1 << BORF)) {
-        DEBUG("Brownout reset!\n");
-    }
-    if (mcusr_mirror & (1 << WDRF)) {
-        if (soft_rst & 0xAA) {
-            DEBUG("Software reset!\n");
-        } else {
-            DEBUG("Watchdog reset!\n");
-        }
-    }
-#if !defined (CPU_ATMEGA328P)
-    if (mcusr_mirror & (1 << JTRF)) {
-        DEBUG("JTAG reset!\n");
-    }
-#endif
-}
-
 void cpu_init(void)
 {
-    _reset_cause();
+    avr8_reset_cause();
 
     wdt_reset();   /* should not be nececessary as done in bootloader */
     wdt_disable(); /* but when used without bootloader this is needed */
 
     /* Initialize stdio before periph_init() to allow use of DEBUG() there */
 #ifdef MODULE_AVR_LIBC_EXTRA
-    atmega_stdio_init();
+    avr8_stdio_init();
 #endif
     /* Initialize peripherals for which modules are included in the makefile.*/
     /* spi_init */
@@ -140,44 +118,3 @@ void heap_stats(void)
     printf("heap: %d (used %d, free %d) [bytes]\n",
            heap_size, heap_size - free, free);
 }
-
-/* This is a vector which is aliased to __vector_default,
- * the vector executed when an ISR fires with no accompanying
- * ISR handler. This may be used along with the ISR() macro to
- * create a catch-all for undefined but used ISRs for debugging
- * purposes.
- * SCIRQS – Symbol Counter Interrupt Status Register
- * BATMON – Battery Monitor Control and Status Register
- * IRQ_STATUS /1 – Transceiver Interrupt Status Register
- * EIFR – External Interrupt Flag Register
- * PCIFR – Pin Change Interrupt Flag Register
- */
-ISR(BADISR_vect)
-{
-    _reset_cause();
-
-#if defined (CPU_ATMEGA256RFR2)
-    printf("IRQ_STATUS %#02x\nIRQ_STATUS1 %#02x\n",
-            (unsigned int)IRQ_STATUS, (unsigned int)IRQ_STATUS1);
-
-    printf("SCIRQS %#02x\nBATMON %#02x\n", (unsigned int)SCIRQS, (unsigned int)BATMON);
-
-    printf("EIFR %#02x\nPCIFR %#02x\n", (unsigned int)EIFR, (unsigned int)PCIFR);
-#endif
-#ifdef LED_PANIC
-    /* Use LED light to signal ERROR. */
-    LED_PANIC;
-#endif
-
-    core_panic(PANIC_GENERAL_ERROR, PSTR("FATAL ERROR: BADISR_vect called, unprocessed Interrupt.\n"
-                  "STOP Execution.\n"));
-}
-
-#if defined(CPU_ATMEGA128RFA1) || defined (CPU_ATMEGA256RFR2)
-ISR(BAT_LOW_vect, ISR_BLOCK)
-{
-    atmega_enter_isr();
-    DEBUG("BAT_LOW\n");
-    atmega_exit_isr();
-}
-#endif

cpu/avr8_common/avr_libc_extra/avr8_stdio.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2018 Kaspar Schleiser <kaspar@schleiser.de>
+ *               2021 Gerson Fernando Budke <nandojve@gmail.com>
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -10,9 +11,10 @@
  * @{
  *
  * @file
- * @brief   Implements common atmega libc stdio initialization
+ * @brief   Implements common avr8 libc stdio initialization
  *
  * @author  Kaspar Schleiser <kaspar@schleiser.de>
+ * @author  Gerson Fernando Budke <nandojve@gmail.com>
  *
  * @}
  */
@@ -41,7 +43,7 @@ static int _uart_getchar(FILE *stream)
     return (int)c;
 }
 
-void atmega_stdio_init(void)
+void avr8_stdio_init(void)
 {
     stdio_init();
 

cpu/avr8_common/doc.txt

@@ -0,0 +1,5 @@
+/**
+ * @defgroup    cpu_avr8_common Atmel AVR-8 CPU: common files
+ * @brief       AVR-8 specific code
+ * @ingroup     cpu
+ */

cpu/avr8_common/include/architecture_arch.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2020 Otto-von-Guericke-Universität Magdeburg
+ *               2021 Gerson Fernando Budke
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -7,13 +8,14 @@
  */
 
 /**
- * @ingroup     cpu_atmega_common
+ * @ingroup     cpu_avr8_common
  * @{
  *
  * @file
  * @brief       Architecture details
  *
  * @author      Marian Buschsieweke <marian.buschsieweke@ovgu.de>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
  *
  */
 

cpu/avr8_common/include/atomic_utils_arch.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2020 Otto-von-Guericke-Universität Magdeburg
+ *               2021 Gerson Fernando Budke
  *
  * This file is subject to the terms and conditions of the GNU Lesser General
  * Public License v2.1. See the file LICENSE in the top level directory for more
@@ -7,13 +8,14 @@
  */
 
 /**
- * @ingroup     cpu_atmega_common
+ * @ingroup     cpu_avr8_common
  *
  * @{
  *
  * @file
  * @brief       Implementation of fast atomic utility functions
  * @author      Marian Buschsieweke <marian.buschsieweke@ovgu.de>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
  */
 
 #ifndef ATOMIC_UTILS_ARCH_H

cpu/avr8_common/include/cpu.h

@@ -2,6 +2,7 @@
  * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
  *               2014 Freie Universität Berlin, Hinnerk van Bruinehsen
  *               2018 RWTH Aachen, Josua Arndt <jarndt@ias.rwth-aachen.de>
+ *               2021 Gerson Fernando Budke <nandojve@gmail.com>
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -9,12 +10,12 @@
  */
 
 /**
- * @ingroup     cpu_atmega_common
+ * @ingroup     cpu_avr8_common
- * @brief       Common implementations and headers for ATmega family based micro-controllers
+ * @brief       Common implementations and headers for AVR-8 family based micro-controllers
  * @{
  *
  * @file
- * @brief       Basic definitions for the ATmega common module
+ * @brief       Basic definitions for the AVR-8 common module
  *
  * When ever you want to do something hardware related, that is accessing MCUs registers directly,
  * just include this file. It will then make sure that the MCU specific headers are included.
@@ -24,6 +25,7 @@
  * @author      Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
  * @author      Kaspar Schleiser <kaspar@schleiser.de>
  * @author      Josua Arndt <jarndt@ias.rwth-aachen.de>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
  *
  */
 
@@ -35,6 +37,7 @@
 
 #include <avr/interrupt.h>
 #include "cpu_conf.h"
+#include "cpu_clock.h"
 #include "sched.h"
 #include "thread.h"
 
@@ -57,10 +60,10 @@ extern "C"
  * @name    Flags for the current state of the ATmega MCU
  * @{
  */
-#define ATMEGA_STATE_FLAG_ISR           (0x80U) /**< In ISR */
+#define AVR8_STATE_FLAG_ISR           (0x80U) /**< In ISR */
-#define ATMEGA_STATE_FLAG_UART0_TX      (0x01U) /**< TX pending for UART 0 */
+#define AVR8_STATE_FLAG_UART0_TX      (0x01U) /**< TX pending for UART 0 */
-#define ATMEGA_STATE_FLAG_UART1_TX      (0x02U) /**< TX pending for UART 1 */
+#define AVR8_STATE_FLAG_UART1_TX      (0x02U) /**< TX pending for UART 1 */
-#define ATMEGA_STATE_FLAG_UART_TX(x)    (0x01U << x) /**< TX pending for UART x */
+#define AVR8_STATE_FLAG_UART_TX(x)    (0x01U << x) /**< TX pending for UART x */
 /** @} */
 
 /**
@@ -68,7 +71,7 @@ extern "C"
  *
  * @note    This variable is updated from IRQ context; access to it should
  *          be wrapped into @ref irq_disable and @ref irq_restore or
- *          @ref atmega_get_state should be used.
+ *          @ref avr8_get_state should be used.
  *
  * Contents:
  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -85,26 +88,26 @@ extern "C"
  * | TX1    | This bit is set when on UART1 TX is pending                   |
  * | TX0    | This bit is set when on UART0 TX is pending                   |
  */
-extern uint8_t atmega_state;
+extern uint8_t avr8_state;
 
 /**
- * @brief   Atomically read the state (@ref atmega_state)
+ * @brief   Atomically read the state (@ref avr8_state)
  *
  * This function guarantees that the read is not optimized out, not reordered
  * and done atomically. This does not mean that by the time return value is
  * processed that it still reflects the value currently stored in
- * @ref atmega_state.
+ * @ref avr8_state.
  *
  * Using ASM rather than C11 atomics has less overhead, as not every access to
  * the state has to be performed atomically: Those done from ISR will not be
  * interrupted (no support for nested interrupts) and barriers at the begin and
  * end of the ISRs make sure the access takes place before IRQ context is left.
  */
-static inline uint8_t atmega_get_state(void)
+static inline uint8_t avr8_get_state(void)
 {
     uint8_t state;
     __asm__ volatile(
-        "lds   %[state], atmega_state       \n\t"
+        "lds   %[state], avr8_state       \n\t"
         : [state]   "=r" (state)
         :
         : "memory"
@@ -117,13 +120,13 @@ static inline uint8_t atmega_get_state(void)
 /**
  * @brief   Run this code on entering interrupt routines
  */
-static inline void atmega_enter_isr(void)
+static inline void avr8_enter_isr(void)
 {
     /* This flag is only called from IRQ context, and nested IRQs are not
      * supported as of now. The flag will be unset before the IRQ context is
      * left, so no need to use memory barriers or atomics here
      */
-    atmega_state |= ATMEGA_STATE_FLAG_ISR;
+    avr8_state |= AVR8_STATE_FLAG_ISR;
 }
 
 /**
@@ -132,16 +135,16 @@ static inline void atmega_enter_isr(void)
  * @retval  !=0     At least on UART device is still sending data out
  * @retval  0       No UART is currently sending data
  */
-static inline int atmega_is_uart_tx_pending(void)
+static inline int avr8_is_uart_tx_pending(void)
 {
-    uint8_t state = atmega_get_state();
+    uint8_t state = avr8_get_state();
-    return (state & (ATMEGA_STATE_FLAG_UART0_TX | ATMEGA_STATE_FLAG_UART1_TX));
+    return (state & (AVR8_STATE_FLAG_UART0_TX | AVR8_STATE_FLAG_UART1_TX));
 }
 
 /**
  * @brief Run this code on exiting interrupt routines
  */
-void atmega_exit_isr(void);
+void avr8_exit_isr(void);
 
 /**
  * @brief Initialization of the CPU
@@ -168,41 +171,15 @@ static inline void __attribute__((always_inline)) cpu_print_last_instruction(voi
     printf("Stack Pointer: 0x%04x\n", ptr);
 }
 
-/**
- * @brief   ATmega system clock prescaler settings
- *
- * Some CPUs may not support the highest prescaler settings
- */
-enum {
-    CPU_ATMEGA_CLK_SCALE_DIV1   = 0,
-    CPU_ATMEGA_CLK_SCALE_DIV2   = 1,
-    CPU_ATMEGA_CLK_SCALE_DIV4   = 2,
-    CPU_ATMEGA_CLK_SCALE_DIV8   = 3,
-    CPU_ATMEGA_CLK_SCALE_DIV16  = 4,
-    CPU_ATMEGA_CLK_SCALE_DIV32  = 5,
-    CPU_ATMEGA_CLK_SCALE_DIV64  = 6,
-    CPU_ATMEGA_CLK_SCALE_DIV128 = 7,
-    CPU_ATMEGA_CLK_SCALE_DIV256 = 8,
-    CPU_ATMEGA_CLK_SCALE_DIV512 = 9,
-};
-
-/**
- * @brief   Initializes system clock prescaler
- */
-static inline void atmega_set_prescaler(uint8_t clk_scale)
-{
-    /* Enable clock change */
-    /* Must be assignment to set all other bits to zero, see datasheet */
-    CLKPR = (1 << CLKPCE);
-
-    /* Write clock within 4 cycles */
-    CLKPR = clk_scale;
-}
-
 /**
  * @brief   Initializes avrlibc stdio
  */
-void atmega_stdio_init(void);
+void avr8_stdio_init(void);
+
+/**
+ * @brief   Print reset cause
+ */
+void avr8_reset_cause(void);
 
 #ifdef __cplusplus
 }

cpu/avr8_common/include/irq_arch.h

@@ -2,6 +2,7 @@
  * Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
  *               2018 RWTH Aachen, Josua Arndt <jarndt@ias.rwth-aachen.de>
  *               2020 Otto-von-Guericke-Universität Magdeburg
+ *               2021 Gerson Fernando Budke
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -9,7 +10,7 @@
  */
 
 /**
- * @ingroup     cpu_atmega_common
+ * @ingroup     cpu_avr8_common
  * @{
  *
  * @file
@@ -19,6 +20,7 @@
  * @author      Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
  * @author      Josua Arndt <jarndt@ias.rwth-aachen.de>
  * @author      Marian Buschsieweke <marian.buschsieweke@ovgu.de>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
  *
  */
 
@@ -28,7 +30,6 @@
 #include <stdint.h>
 #include <stdio.h>
 #include <stdint.h>
-#include "irq.h"
 #include "cpu.h"
 
 #ifdef __cplusplus
@@ -98,8 +99,8 @@ __attribute__((always_inline)) static inline void irq_restore(unsigned int _stat
  */
 __attribute__((always_inline)) static inline int irq_is_in(void)
 {
-    uint8_t state = atmega_get_state();
+    uint8_t state = avr8_get_state();
-    return (state & ATMEGA_STATE_FLAG_ISR);
+    return (state & AVR8_STATE_FLAG_ISR);
 }
 
 #ifdef __cplusplus

cpu/avr8_common/startup.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
+ *               2021 Gerson Fernando Budke
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -7,7 +8,7 @@
  */
 
 /**
- * @ingroup     cpu_atmega_common
+ * @ingroup     cpu_avr8_common
  * @{
  *
  * @file
@@ -16,6 +17,7 @@
  * @author      Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
  * @author      Josua Arndt <jarndt@ias.rwth-aachen.de>
  * @author      Steffen Robertz <steffen.robertz@rwth-aachen.de>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
  * @}
  */
 

cpu/avr8_common/thread_arch.c

@@ -2,6 +2,7 @@
  * Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
  *               2017 Thomas Perrot <thomas.perrot@tupi.fr>
  *               2018 RWTH Aachen, Josua Arndt <jarndt@ias.rwth-aachen.de>
+ *               2021 Gerson Fernando Budke
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -9,7 +10,7 @@
  */
 
 /**
- * @ingroup     cpu_atmega_common
+ * @ingroup     cpu_avr8_common
  * @{
  *
  * @file
@@ -18,6 +19,7 @@
  * @author      Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
  * @author      Thomas Perrot <thomas.perrot@tupi.fr>
  * @author      Josua Arndt <jarndt@ias.rwth-aachen.de>
+ * @author      Gerson Fernando Budke <nandojve@gmail.com>
  *
  * @}
  */
@@ -30,13 +32,13 @@
 #include "cpu.h"
 #include "board.h"
 
-static void atmega_context_save(void);
+static void avr8_context_save(void);
-static void atmega_context_restore(void);
+static void avr8_context_restore(void);
-static void atmega_enter_thread_mode(void);
+static void avr8_enter_thread_mode(void);
 
 /**
  * @brief Since AVR doesn't support direct manipulation of the program counter we
- * model a stack like it would be left by atmega_context_save().
+ * model a stack like it would be left by avr8_context_save().
  * The resulting layout in memory is the following:
  * ---------------thread_t (not created by thread_stack_init) ----------
  * local variables (a temporary value and the stackpointer)
@@ -48,7 +50,7 @@ static void atmega_enter_thread_mode(void);
  * -----------------------------------------------------------------------
  * a 16 Bit pointer to task_func
  * this is placed exactly at the place where the program counter would be
- * stored normally and thus can be returned to when atmega_context_restore()
+ * stored normally and thus can be returned to when avr8_context_restore()
  * has been run
  * (Optional 17 bit (bit is set to zero) for devices with > 128kb FLASH)
  * -----------------------------------------------------------------------
@@ -61,7 +63,7 @@ static void atmega_enter_thread_mode(void);
  * r26 - r31
  * -----------------------------------------------------------------------
  *
- * After the invocation of atmega_context_restore() the pointer to task_func is
+ * After the invocation of avr8_context_restore() the pointer to task_func is
  * on top of the stack and can be returned to. This way we can actually place
  * it inside of the program counter of the MCU.
  * if task_func returns sched_task_exit gets popped into the PC
@@ -198,7 +200,7 @@ void thread_stack_print(void)
 void cpu_switch_context_exit(void)
 {
     sched_run();
-    atmega_enter_thread_mode();
+    avr8_enter_thread_mode();
 }
 
 #define STACK_POINTER  ((char *)AVR_STACK_POINTER_REG)
@@ -210,7 +212,7 @@ extern char *__brkval;
 /**
  * @brief Set the MCU into Thread-Mode and load the initial task from the stack and run it
  */
-void NORETURN atmega_enter_thread_mode(void)
+void NORETURN avr8_enter_thread_mode(void)
 {
     irq_enable();
 
@@ -226,7 +228,7 @@ void NORETURN atmega_enter_thread_mode(void)
         __brkval = __malloc_heap_start;
     }
 
-    atmega_context_restore();
+    avr8_context_restore();
     __asm__ volatile ("ret");
 
     UNREACHABLE();
@@ -235,9 +237,9 @@ void NORETURN atmega_enter_thread_mode(void)
 void thread_yield_higher(void)
 {
     if (irq_is_in() == 0) {
-        atmega_context_save();
+        avr8_context_save();
         sched_run();
-        atmega_context_restore();
+        avr8_context_restore();
         __asm__ volatile ("ret");
     }
     else {
@@ -245,20 +247,20 @@ void thread_yield_higher(void)
     }
 }
 
-void atmega_exit_isr(void)
+void avr8_exit_isr(void)
 {
-    atmega_state &= ~ATMEGA_STATE_FLAG_ISR;
+    avr8_state &= ~AVR8_STATE_FLAG_ISR;
-    /* Force access to atmega_state to take place */
+    /* Force access to avr8_state to take place */
     __asm__ volatile ("" : : : "memory");
     if (sched_context_switch_request) {
-        atmega_context_save();
+        avr8_context_save();
         sched_run();
-        atmega_context_restore();
+        avr8_context_restore();
         __asm__ volatile ("reti");
     }
 }
 
-__attribute__((always_inline)) static inline void atmega_context_save(void)
+__attribute__((always_inline)) static inline void avr8_context_save(void)
 {
     __asm__ volatile (
         "push __tmp_reg__                    \n\t"
@@ -313,7 +315,7 @@ __attribute__((always_inline)) static inline void atmega_context_save(void)
         "st   x+, __tmp_reg__                \n\t");
 }
 
-__attribute__((always_inline)) static inline void atmega_context_restore(void)
+__attribute__((always_inline)) static inline void avr8_context_restore(void)
 {
     __asm__ volatile (
         "lds  r26, sched_active_thread       \n\t"

drivers/at86rf2xx/at86rf2xx_netdev.c

@@ -870,7 +870,7 @@ ISR(TRX24_TX_START_vect){
  */
 ISR(TRX24_RX_END_vect, ISR_BLOCK)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     uint8_t status = *AT86RF2XX_REG__TRX_STATE & AT86RF2XX_TRX_STATUS_MASK__TRX_STATUS;
     DEBUG("TRX24_RX_END 0x%x\n", status);
@@ -879,7 +879,7 @@ ISR(TRX24_RX_END_vect, ISR_BLOCK)
     /* Call upper layer to process received data */
     netdev_trigger_event_isr(at86rfmega_dev);
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 
 /**
@@ -892,12 +892,12 @@ ISR(TRX24_RX_END_vect, ISR_BLOCK)
  */
 ISR(TRX24_XAH_AMI_vect, ISR_BLOCK)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     DEBUG("TRX24_XAH_AMI\n");
     ((at86rf2xx_t *)at86rfmega_dev)->irq_status |= AT86RF2XX_IRQ_STATUS_MASK__AMI;
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 
 /**
@@ -909,7 +909,7 @@ ISR(TRX24_XAH_AMI_vect, ISR_BLOCK)
  */
 ISR(TRX24_TX_END_vect, ISR_BLOCK)
 {
-    atmega_enter_isr();
+    avr8_enter_isr();
 
     at86rf2xx_t *dev = (at86rf2xx_t *) at86rfmega_dev;
     uint8_t status = *AT86RF2XX_REG__TRX_STATE & AT86RF2XX_TRX_STATUS_MASK__TRX_STATUS;
@@ -924,7 +924,7 @@ ISR(TRX24_TX_END_vect, ISR_BLOCK)
         netdev_trigger_event_isr(at86rfmega_dev);
     }
 
-    atmega_exit_isr();
+    avr8_exit_isr();
 }
 
 #endif /* MODULE_AT86RFA1 || MODULE_AT86RFR2 */