boards: remove all C++ comments
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@ -34,9 +34,9 @@ extern "C" {
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#define MSG_TYPE_SMB380_WAKEUP 814
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#define SMB380_X_AXIS 0 //X Axis-Name
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#define SMB380_Y_AXIS 1 //Y Axis-Name
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#define SMB380_Z_AXIS 2 //Z Axis-Name
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#define SMB380_X_AXIS 0 /* X Axis-Name */
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#define SMB380_Y_AXIS 1 /* Y Axis-Name */
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#define SMB380_Z_AXIS 2 /* Z Axis-Name */
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#define LPM_PREVENT_SLEEP_ACCSENSOR BIT2
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@ -47,8 +47,8 @@ enum SMB380_MODE {
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SMB380_THRESHOLD,
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SMB380_FALSEALERT
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};
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//volatile enum SMB380_MODE
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volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
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/* volatile enum SMB380_MODE */
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volatile enum SMB380_MODE smb380_mode;/* = SMB380_POLL; */
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/* Writeable values to EEPROM: from 0x0A (control1) to 0x1D (offset_T).
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For writing enable ... flag and add eeprom_offset_address.
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@ -58,32 +58,32 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
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*/
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#define SMB380_EEPROM_OFFSET 0x20
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//Chip-ID Bit0-2, default: 010b
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/* Chip-ID Bit0-2, default: 010b */
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#define SMB380_CHIP_ID 0x00
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//Chip-ID mask
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/* Chip-ID mask */
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#define SMB380_CHIP_ID_MASK 0x07
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//ml_version Bit0-3 ; al_version Bit4-7
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/* ml_version Bit0-3 ; al_version Bit4-7 */
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#define SMB380_AL_ML_VERSION 0x01
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#define SMB380_AL_MASK 0xF0
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#define SMB380_ML_MASK 0x0F
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//LSB_acc_x Bit6-7; new_data_x Bit0
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/* LSB_acc_x Bit6-7; new_data_x Bit0 */
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#define SMB380_ACC_X_LSB_NEWDATA 0x02
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//MSB_acc_x Bit0-7
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/* MSB_acc_x Bit0-7 */
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#define SMB380_ACC_X_MSB 0x03
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//LSB_acc_y Bit6-7; new_data_y Bit0
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/* LSB_acc_y Bit6-7; new_data_y Bit0 */
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#define SMB380_ACC_Y_LSB_NEWDATA 0x04
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//MSB_acc_y Bit0-7
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/* MSB_acc_y Bit0-7 */
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#define SMB380_ACC_Y_MSB 0x05
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//LSB_acc_z Bit6-7; new_data_z Bit0
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/* LSB_acc_z Bit6-7; new_data_z Bit0 */
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#define SMB380_ACC_Z_LSB_NEWDATA 0x06
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//MSB_acc_z Bit0-7
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/* MSB_acc_z Bit0-7 */
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#define SMB380_ACC_Z_MSB 0x07
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#define SMB380_ACC_LSB_MASK 0xC0
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#define SMB380_ACC_MSB_MASK 0xFF
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#define SMB380_ACC_NEWDATA_MASK 0x01
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//Temperature Bit0-7
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/* Temperature Bit0-7 */
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#define SMB380_TEMP 0x08
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//Status register, contains six flags
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/* Status register, contains six flags */
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#define SMB380_STATUS 0x09
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#define SMB380_STATUS_ST_RESULT_MASK 0x80
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#define SMB380_STATUS_ALERT_PHASE_MASK 0x10
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@ -91,7 +91,7 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
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#define SMB380_STATUS_HG_LATCHED_MASK 0x04
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#define SMB380_STATUS_STATUS_LG_MASK 0x02
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#define SMB380_STATUS_STATUS_HG_MASK 0x01
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//Control register - contains seven values, default: x000 0000b
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/* Control register - contains seven values, default: x000 0000b */
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#define SMB380_CONTROL1 0x0A
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#define SMB380_CONTROL1_RESET_INT_MASK 0x40
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#define SMB380_CONTROL1_UPDATE_MASK 0x20
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@ -100,7 +100,7 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
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#define SMB380_CONTROL1_SELF_TEST_0_MASK 0x04
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#define SMB380_CONTROL1_SOFT_RESET_MASK 0x02
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#define SMB380_CONTROL1_SLEEP_MASK 0x01
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//Control register - contains six values, default: x000 0011b
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/* Control register - contains six values, default: x000 0011b */
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#define SMB380_CONTROL2 0x0B
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#define SMB380_CONTROL2_ALERT_MASK 0x80
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#define SMB380_CONTROL2_ANY_MOTION_MASK 0x40
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@ -108,30 +108,30 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
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#define SMB380_CONTROL2_COUNTER_LG_MASK 0x0C
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#define SMB380_CONTROL2_ENABLE_HG_MASK 0x02
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#define SMB380_CONTROL2_ENABLE_LG_MASK 0x01
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//default: 20
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/* default: 20 */
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#define SMB380_LG_THRES 0x0C
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//default: 150
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/* default: 150 */
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#define SMB380_LG_DUR 0x0D
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//default: 160
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/* default: 160 */
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#define SMB380_HG_THRES 0x0E
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//default: 150
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/* default: 150 */
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#define SMB380_HG_DUR 0x0F
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//default: 0
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/* default: 0 */
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#define SMB380_ANY_MOTION_THRES 0x10
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//default: 0000 0000b
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/* default: 0000 0000b */
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#define SMB380_ANY_MOTION_DUR_HYST 0x1
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#define SMB380_ANY_MOTION_DUR_MASK 0xC0
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#define SMB380_ANY_MOTION_DUR_HG_HYST_MASK 0x38
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#define SMB380_ANY_MOTION_DUR_LG_HYST_MASK 0x07
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//default: 162
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/* default: 162 */
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#define SMB380_CUST1 0x12
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//default: 13
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/* default: 13 */
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#define SMB380_CUST2 0x13
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//default: xxx0 1110b
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/* default: xxx0 1110b */
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#define SMB380_CONTROL3 0x14
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#define SMB380_CONTROL3_RANGE_MASK 0x18
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#define SMB380_CONTROL3_BANDWITH_MASK 0x07
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//default: 1000 0000b
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/* default: 1000 0000b */
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#define SMB380_CONTROL4 0x15
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#define SMB380_CONTROL4_SPI4_MASK 0x80
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#define SMB380_CONTROL4_ENABLE_ADV_INT_MASK 0x40
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@ -171,9 +171,9 @@ volatile enum SMB380_MODE smb380_mode;// = SMB380_POLL;
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#define SMB380_BAND_WIDTH_375HZ 0x04
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#define SMB380_BAND_WIDTH_750HZ 0x05
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#define SMB380_BAND_WIDTH_1500HZ 0x06
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//SMB380_RING_BUFF_SIZE * int16_t (2Byte) * 4 (x,y,z,Temp) = 512 Byte (for 64)
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/* SMB380_RING_BUFF_SIZE * int16_t (2Byte) * 4 (x,y,z,Temp) = 512 Byte (for 64) */
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#define SMB380_RING_BUFF_SIZE 256
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//TODO chsnge size to 2048
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/* TODO chsnge size to 2048 */
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#define SMB380_RING_BUFF_MAX_THREADS 10
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#define SMB380_SAMPLE_RATE_MAX 3000
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@ -192,15 +192,15 @@ void SMB380_update_image(void);
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* enable write to 0x16 to 0x3D
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**/
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void SMB380_enable_eeprom_default(void);
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//Example Hysterese function
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/* Example Hysterese function */
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uint8_t SMB380_HystereseFunctionSample(int16_t *value);
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//Simple api for single-sample, single thread interrupt mode
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/* Simple api for single-sample, single thread interrupt mode */
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uint8_t SMB380_init_simple(uint16_t samplerate, uint8_t bandwidth,
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uint8_t range);
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//Enables Interrupts (normally only once called)
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/* Enables Interrupts (normally only once called) */
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uint8_t SMB380_init(uint8_t (*func)(int16_t *));
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void SMB380_setSampleRate(uint16_t rate);
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uint16_t SMB380_getSampleRate(void);
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@ -214,7 +214,7 @@ uint8_t checkRange(int16_t *value);
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void SMB380_enableEEPROM(void);
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void SMB380_disableEEPROM(void);
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// getter
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/* getter */
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float SMB380_getSampleRatio(void);
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void SMB380_getAcceleration(unsigned char axis, int16_t *pAbs, int16_t *pMg);
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int16_t SMB380_getTemperature(void);
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@ -229,7 +229,7 @@ unsigned char SMB380_readOffsetTemp(uint16_t *offset);
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unsigned char SMB380_readGain(uint16_t *gain);
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unsigned char SMB380_readGainTemp(uint16_t *gain);
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// setter
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/* setter */
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void SMB380_setTempOffset(uint16_t offset, uint8_t EEPROM);
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void SMB380_setWakeUpPause(unsigned char duration);
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void SMB380_setBandWidth(unsigned char bandWidth);
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@ -250,7 +250,7 @@ void SMB380_resetInterruptFlags(void);
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void SMB380_writeOffset(uint16_t *offset, uint8_t EEPROM);
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void SMB380_writeOffsetTemp(uint16_t *offset, uint8_t EEPROM);
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// stats
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/* stats */
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void SMB380_ShowMemory(void);
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void SMB380_Selftest_1(void);
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@ -56,13 +56,13 @@ extern "C" {
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#define FIFOSIZE 8
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/* SSP select pin */
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#define SSP0_SEL 1 << 21 //P1.21 SMB380
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#define SSP0_SEL 1 << 21 /* P1.21 SMB380 */
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#define SSP0_SELN 1 << 16 //P0.16 Nanotron
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#define SSP0_SELN 1 << 16 /* P0.16 Nanotron */
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/* SSP1 external interrupt Pin (SMB380 specific) */
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#define SMB380_INT1 1 << 1 //P0.1
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#define BMA180_INT1 1 << 8 //P2.8
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#define SMB380_INT1 1 << 1 /* P0.1 */
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#define BMA180_INT1 1 << 8 /* P2.8 */
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@ -32,12 +32,12 @@
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extern "C" {
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#endif
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// for correct inclusion of <msp430.h>
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/* for correct inclusion of <msp430.h> */
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#ifndef __MSP430F1612__
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#define __MSP430F1612__
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#endif
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//MSB430 core
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/* MSB430 core */
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#define MSP430_INITIAL_CPU_SPEED 2457600uL
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#define F_CPU MSP430_INITIAL_CPU_SPEED
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#define F_RC_OSCILLATOR 32768
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@ -64,4 +64,4 @@ extern "C" {
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typedef uint8_t radio_packet_length_t;
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/** @} */
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#endif // MSB_BOARD_H_
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#endif /* MSB_BOARD_H_ */
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@ -31,13 +31,13 @@
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extern "C" {
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#endif
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#define SHT11_SCK_LOW FIO1CLR = BIT25; // serial clock line low
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#define SHT11_SCK_HIGH FIO1SET = BIT25; // serial clock line high
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#define SHT11_DATA ((FIO1PIN & BIT26) != 0) // read serial I/O
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#define SHT11_DATA_LOW (FIO1CLR = BIT26); // serial I/O line low
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#define SHT11_DATA_HIGH (FIO1SET = BIT26); // serial I/O line high
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#define SHT11_DATA_IN (FIO1DIR &= ~BIT26) // serial I/O as input
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#define SHT11_DATA_OUT (FIO1DIR |= BIT26) // serial I/O as output
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#define SHT11_SCK_LOW FIO1CLR = BIT25; /* serial clock line low */
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#define SHT11_SCK_HIGH FIO1SET = BIT25; /* serial clock line high */
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#define SHT11_DATA ((FIO1PIN & BIT26) != 0) /* read serial I/O */
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#define SHT11_DATA_LOW (FIO1CLR = BIT26); /* serial I/O line low */
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#define SHT11_DATA_HIGH (FIO1SET = BIT26); /* serial I/O line high */
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#define SHT11_DATA_IN (FIO1DIR &= ~BIT26) /* serial I/O as input */
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#define SHT11_DATA_OUT (FIO1DIR |= BIT26) /* serial I/O as output */
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#define SHT11_INIT FIO1DIR |= BIT25; PINSEL3 &= ~(BIT14|BIT15 | BIT16|BIT17);
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#ifdef __cplusplus
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@ -41,4 +41,4 @@ static inline void pllfeed(void)
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#endif
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/** @} */
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#endif // MSBA2_COMMON_H_
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#endif /* MSBA2_COMMON_H_ */
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@ -18,19 +18,19 @@
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extern char *lpc_return_strings[];
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struct sector_info_struct { // an array of
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int address; // where each sector is located
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int size; // and how big it is
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struct sector_info_struct { /* an array of */
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int address; /* where each sector is located */
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int size; /* and how big it is */
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};
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struct chip_info_struct {
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char *part_number; // human readable part number
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char *id_string; // id string sent by "J" command
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unsigned int ram_addr; // where to download into RAM
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int chunk_size; // download to ram chunk size
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int num_sector; // number of flash sectors
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struct sector_info_struct *layout; // layout of sectors
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const unsigned int *bootprog; // code that boots into user program (NULL = DTR/RTS only)
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char *part_number; /* human readable part number */
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char *id_string; /* id string sent by "J" command */
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unsigned int ram_addr; /* where to download into RAM */
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int chunk_size; /* download to ram chunk size */
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int num_sector; /* number of flash sectors */
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struct sector_info_struct *layout; /* layout of sectors */
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const unsigned int *bootprog; /* code that boots into user program (NULL = DTR/RTS only) */
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};
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extern struct chip_info_struct chip_info[];
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@ -22,4 +22,4 @@
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void hard_reset_to_bootloader(void);
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void hard_reset_to_user_code(void);
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#endif // ..._H_
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#endif /* ..._H_ */
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@ -27,4 +27,4 @@ void change_baud(const char *baud_name);
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*/
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void signal_terminal(void);
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#endif // LPC2K_PGM
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#endif /* LPC2K_PGM */
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@ -34,4 +34,4 @@ void set_rts(int val);
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void set_dtr(int val);
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void change_baud(const char *baud_name);
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#endif // SERIAL_H_
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#endif /* SERIAL_H_ */
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@ -62,4 +62,4 @@ extern void(*nvm_setsvar)(uint32_t zero_for_awesome);
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}
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#endif
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#endif //NVM_H_
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#endif /* NVM_H_ */
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@ -27,7 +27,7 @@
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extern "C" {
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#endif
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#define F_CPU (24000000) ///< CPU target speed in Hz
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#define F_CPU (24000000) /* /< CPU target speed in Hz */
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#define CTUNE 0xb
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#define IBIAS 0x1f
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@ -30,12 +30,12 @@
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extern "C" {
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#endif
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// for correct inclusion of <msp430.h>
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/* for correct inclusion of <msp430.h> */
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#ifndef __MSP430F1611__
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#define __MSP430F1611__
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#endif
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//TelosB core
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/* TelosB core */
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#define MSP430_INITIAL_CPU_SPEED 2457600uL
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#define F_CPU MSP430_INITIAL_CPU_SPEED
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#define F_RC_OSCILLATOR 32768
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@ -70,4 +70,4 @@ extern "C" {
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typedef uint8_t radio_packet_length_t;
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/** @} */
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#endif // TELOSB_BOARD_H_
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#endif /* TELOSB_BOARD_H_ */
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@ -32,12 +32,12 @@
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extern "C" {
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#endif
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// for correct inclusion of <msp430.h>
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/* for correct inclusion of <msp430.h> */
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#ifndef __MSP430F1611__
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#define __MSP430F1611__
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#endif
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//MSB430 core
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/* MSB430 core */
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#define MSP430_INITIAL_CPU_SPEED 800000uL
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#define F_CPU MSP430_INITIAL_CPU_SPEED
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#define F_RC_OSCILLATOR 32768
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@ -72,4 +72,4 @@ extern "C" {
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typedef uint8_t radio_packet_length_t;
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/** @} */
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#endif // WSN_BOARD_H_
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#endif /* WSN_BOARD_H_ */
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@ -40,7 +40,7 @@ extern "C" {
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#define __MSP430F2617__
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#endif
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// MSP430 core
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/* MSP430 core */
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#define MSP430_INITIAL_CPU_SPEED 8000000uL
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#ifndef F_CPU
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#define F_CPU MSP430_INITIAL_CPU_SPEED
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@ -49,7 +49,7 @@ extern "C" {
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#define MSP430_HAS_DCOR 0
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#define MSP430_HAS_EXTERNAL_CRYSTAL 1
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// LEDs ports
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/* LEDs ports */
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#define LEDS_PxDIR P5DIR
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#define LEDS_PxOUT P5OUT
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#define LEDS_CONF_RED 0x10
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@ -69,7 +69,7 @@ extern "C" {
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#define LED_BLUE_TOGGLE LEDS_PxOUT ^= LEDS_CONF_BLUE
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// User-button port
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/* User-button port */
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#define USER_BTN_PxIN P2IN
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#define USER_BTN_MASK 0x20
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@ -83,4 +83,4 @@ typedef uint8_t radio_packet_length_t;
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#endif
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/** @} */
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#endif // Z1_BOARD_H_
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#endif /* Z1_BOARD_H_ */
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