cpu/esp32: replace ets_printf by printf
Wherever possible, ets_printf is replaced by newlib printf.
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1f940b0728
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5d51c03af9
@ -26,7 +26,6 @@
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#include "adc_ctrl.h"
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#include "esp_common.h"
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#include "gpio_arch.h"
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#include "rom/ets_sys.h"
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#include "soc/rtc_io_struct.h"
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#include "soc/rtc_cntl_struct.h"
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#include "soc/sens_reg.h"
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@ -271,11 +270,11 @@ static void _adc_module_init(void)
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void adc_print_config(void)
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{
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ets_printf("\tADC\t\tpins=[ ");
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printf("\tADC\t\tpins=[ ");
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#if defined(ADC_GPIOS)
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for (unsigned i = 0; i < ADC_NUMOF; i++) {
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ets_printf("%d ", adc_channels[i]);
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printf("%d ", adc_channels[i]);
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}
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#endif /* defined(ADC_GPIOS) */
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ets_printf("]\n");
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printf("]\n");
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}
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@ -26,7 +26,6 @@
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#include "adc_ctrl.h"
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#include "esp_common.h"
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#include "gpio_arch.h"
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#include "rom/ets_sys.h"
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#include "soc/rtc_io_struct.h"
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#include "soc/rtc_cntl_struct.h"
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#include "soc/sens_reg.h"
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@ -136,11 +135,11 @@ static bool _dac_conf_check(void)
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void dac_print_config(void)
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{
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ets_printf("\tDAC\t\tpins=[ ");
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printf("\tDAC\t\tpins=[ ");
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#if defined(DAC_GPIOS)
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for (unsigned i = 0; i < DAC_NUMOF; i++) {
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ets_printf("%d ", dac_channels[i]);
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printf("%d ", dac_channels[i]);
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}
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#endif /* defined(DAC_GPIOS) */
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ets_printf("]\n");
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printf("]\n");
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}
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@ -869,8 +869,8 @@ static void _i2c_reset_hw (i2c_t dev)
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void i2c_print_config(void)
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{
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for (unsigned dev = 0; dev < I2C_NUMOF; dev++) {
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ets_printf("\tI2C_DEV(%d)\tscl=%d sda=%d\n",
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dev, i2c_config[dev].scl, i2c_config[dev].sda);
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printf("\tI2C_DEV(%u)\tscl=%d sda=%d\n",
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dev, i2c_config[dev].scl, i2c_config[dev].sda);
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}
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}
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@ -700,8 +700,8 @@ static /* IRAM */ int _i2c_read_byte(_i2c_bus_t* bus, uint8_t *byte, bool ack)
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void i2c_print_config(void)
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{
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for (unsigned dev = 0; dev < I2C_NUMOF; dev++) {
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ets_printf("\tI2C_DEV(%d)\tscl=%d sda=%d\n",
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dev, i2c_config[dev].scl, i2c_config[dev].sda);
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printf("\tI2C_DEV(%u)\tscl=%d sda=%d\n",
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dev, i2c_config[dev].scl, i2c_config[dev].sda);
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}
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}
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@ -32,7 +32,6 @@
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#include "gpio_arch.h"
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#include "driver/periph_ctrl.h"
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#include "rom/ets_sys.h"
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#include "soc/gpio_struct.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/mcpwm_reg.h"
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@ -437,11 +436,11 @@ static bool _pwm_configuration(void)
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void pwm_print_config(void)
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{
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for (unsigned pwm = 0; pwm < PWM_NUMOF; pwm++) {
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ets_printf("\tPWM_DEV(%d)\tchannels=[ ", pwm);
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printf("\tPWM_DEV(%d)\tchannels=[ ", pwm);
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for (int i = 0; i < _pwm_hw[pwm].gpio_num; i++) {
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ets_printf("%d ", _pwm_hw[pwm].gpios[i]);
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printf("%d ", _pwm_hw[pwm].gpios[i]);
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}
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ets_printf("]\n");
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printf("]\n");
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}
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}
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@ -125,7 +125,7 @@ void IRAM_ATTR spi_init (spi_t bus)
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_spi[bus].signal_miso = VSPIQ_IN_IDX;
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break;
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default: LOG_TAG_ERROR("spi", "invalid SPI interface controller "
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"used for SPI_DEV(%d)\n");
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"used for SPI_DEV(%d)\n", bus);
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break;
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}
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return;
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@ -361,11 +361,11 @@ static const char* _spi_names[] = { "CSPI", "FSPI", "HSPI", "VSPI" };
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void spi_print_config(void)
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{
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for (unsigned bus = 0; bus < SPI_NUMOF; bus++) {
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ets_printf("\tSPI_DEV(%d)\t%s ", bus, _spi_names[spi_config[bus].ctrl]);
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ets_printf("sck=%d " , spi_config[bus].sck);
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ets_printf("miso=%d ", spi_config[bus].miso);
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ets_printf("mosi=%d ", spi_config[bus].mosi);
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ets_printf("cs=%d\n" , spi_config[bus].cs);
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printf("\tSPI_DEV(%u)\t%s ", bus, _spi_names[spi_config[bus].ctrl]);
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printf("sck=%d " , spi_config[bus].sck);
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printf("miso=%d ", spi_config[bus].miso);
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printf("mosi=%d ", spi_config[bus].mosi);
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printf("cs=%d\n" , spi_config[bus].cs);
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}
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}
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@ -205,8 +205,8 @@ void uart_system_init (void)
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void uart_print_config(void)
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{
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for (unsigned uart = 0; uart < UART_NUMOF; uart++) {
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ets_printf("\tUART_DEV(%d)\ttxd=%d rxd=%d\n", uart,
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uart_config[uart].txd, uart_config[uart].rxd);
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printf("\tUART_DEV(%u)\ttxd=%d rxd=%d\n", uart,
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uart_config[uart].txd, uart_config[uart].rxd);
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}
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}
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@ -43,18 +43,18 @@ void esp_hexdump (const void* addr, uint32_t num, char width, uint8_t per_line)
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while (count < num) {
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if (count % per_line == 0) {
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ets_printf ("%08" PRIx32 ": ", (uint32_t)((uint8_t*)addr+count*size));
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printf ("%08" PRIx32 ": ", (uint32_t)((uint8_t*)addr+count*size));
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}
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switch (width) {
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case 'b': ets_printf("%02" PRIx8 " ", addr8[count++]); break;
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case 'h': ets_printf("%04" PRIx16 " ", addr16[count++]); break;
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case 'w': ets_printf("%08" PRIx32 " ", addr32[count++]); break;
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case 'g': ets_printf("%016" PRIx64 " ", addr64[count++]); break;
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default : ets_printf("."); count++; break;
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case 'b': printf("%02" PRIx8 " ", addr8[count++]); break;
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case 'h': printf("%04" PRIx16 " ", addr16[count++]); break;
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case 'w': printf("%08" PRIx32 " ", addr32[count++]); break;
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case 'g': printf("%016" PRIx64 " ", addr64[count++]); break;
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default : printf("."); count++; break;
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}
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if (count % per_line == 0) {
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ets_printf ("\n");
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printf ("\n");
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}
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}
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ets_printf ("\n");
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printf ("\n");
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}
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10
cpu/esp32/vendor/esp-idf/esp_funcs.c
vendored
10
cpu/esp32/vendor/esp-idf/esp_funcs.c
vendored
@ -165,11 +165,11 @@ void spi_ram_init(void)
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_spi_ram_initialized = true;
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}
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else {
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ets_printf("Failed to init external SPI RAM\n");
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ESP_EARLY_LOGE("spi_ram", "Failed to init external SPI RAM\n");
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_spi_ram_initialized = false;
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}
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#else
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ets_printf("External SPI RAM functions not enabled\n");
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ESP_EARLY_LOGI("spi_ram", "External SPI RAM functions not enabled\n");
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#endif
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}
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@ -189,14 +189,14 @@ void spi_ram_heap_init(void)
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#if CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC
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esp_err_t r=esp_spiram_add_to_heapalloc();
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if (r != ESP_OK) {
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ets_printf("External SPI RAM could not be added to heap!\n");
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ESP_EARLY_LOGE("spi_ram", "External SPI RAM could not be added to heap!\n");
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abort();
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}
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#if CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL
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r=esp_spiram_reserve_dma_pool(CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL);
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if (r != ESP_OK) {
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ets_printf("Could not reserve internal/DMA pool!\n");
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ESP_EARLY_LOGE("spi_ram", "Could not reserve internal/DMA pool!\n");
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abort();
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}
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#endif /* CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL */
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@ -208,7 +208,7 @@ void spi_ram_heap_init(void)
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#endif /* CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC */
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#else /* CONFIG_SPIRAM_SUPPORT */
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ets_printf("External SPI RAM functions not enabled\n");
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ESP_EARLY_LOGI("spi_ram", "External SPI RAM functions not enabled\n");
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#endif /* CONFIG_SPIRAM_SUPPORT */
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}
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