cpu/stm32: avoid configuring stm32mp1 APB1 clock

APB1 bus clock is always enabled is not manageable by RCC register.
So avoid enabling it.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
This commit is contained in:
Gilles DOFFE 2020-08-03 00:19:58 +02:00
parent 7a2550da9b
commit 5e30e60fec

View File

@ -44,7 +44,7 @@
#define BIT_APB_PWREN RCC_APB1ENR1_PWREN
#elif defined (CPU_FAM_STM32G0)
#define BIT_APB_PWREN RCC_APBENR1_PWREN
#else
#elif !defined(CPU_FAM_STM32MP1)
#define BIT_APB_PWREN RCC_APB1ENR_PWREN
#endif
@ -152,7 +152,7 @@ void cpu_init(void)
/* initialize the Cortex-M core */
cortexm_init();
/* enable PWR module */
#ifndef CPU_FAM_STM32WB
#if !defined(CPU_FAM_STM32WB) && !defined(CPU_FAM_STM32MP1)
periph_clk_en(APB1, BIT_APB_PWREN);
#endif
#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \