Merge pull request #5590 from mali/atmega_common

cpu/atmega_common: improve to add smaller atmega MCUs.
This commit is contained in:
kYc0o 2016-08-31 18:29:53 +02:00 committed by GitHub
commit 5e3747ea8b
5 changed files with 16 additions and 2 deletions

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@ -97,6 +97,7 @@ extern "C" {
*/ */
#define SPI_NUMOF 1 /* set to 0 to disable SPI */ #define SPI_NUMOF 1 /* set to 0 to disable SPI */
#define SPI_0_EN 1 /* remove once SPI rework is done */ #define SPI_0_EN 1 /* remove once SPI rework is done */
#define MEGA_PRR PRR0 /* Power Reduction Register is PRR0 */
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus

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@ -104,6 +104,7 @@ extern "C" {
*/ */
#define SPI_NUMOF 1 /* set to 0 to disable SPI */ #define SPI_NUMOF 1 /* set to 0 to disable SPI */
#define SPI_0_EN 1 /* remove once SPI rework is done */ #define SPI_0_EN 1 /* remove once SPI rework is done */
#define MEGA_PRR PRR0 /* Power Reduction Resgister */
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus

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@ -17,6 +17,7 @@
* *
* @author René Herthel <rene-herthel@outlook.de> * @author René Herthel <rene-herthel@outlook.de>
* @author Francisco Acosta <francisco.acosta@inria.fr> * @author Francisco Acosta <francisco.acosta@inria.fr>
* @author Laurent Navet <laurent.navet@gmail.com>
* *
* @} * @}
*/ */
@ -84,10 +85,11 @@ static inline uint16_t _port_addr(gpio_t pin)
port_addr += GPIO_BASE_PORT_A; port_addr += GPIO_BASE_PORT_A;
port_addr += GPIO_OFFSET_PIN_PORT; port_addr += GPIO_OFFSET_PIN_PORT;
#if defined (PORTG)
if (port_num > PORT_G) { if (port_num > PORT_G) {
port_addr += GPIO_OFFSET_PORT_H; port_addr += GPIO_OFFSET_PORT_H;
} }
#endif
return port_addr; return port_addr;
} }
@ -133,7 +135,9 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
uint8_t pin_num = _pin_num(pin); uint8_t pin_num = _pin_num(pin);
if ((_port_num(pin) == PORT_D && pin_num > 3) if ((_port_num(pin) == PORT_D && pin_num > 3)
#if defined (PORTE)
|| (_port_num(pin) == PORT_E && pin_num < 4) || (_port_num(pin) == PORT_E && pin_num < 4)
#endif
|| ((mode != GPIO_IN) && (mode != GPIO_IN_PU))) { || ((mode != GPIO_IN) && (mode != GPIO_IN_PU))) {
return -1; return -1;
} }
@ -151,25 +155,31 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
if (pin_num < 4) { if (pin_num < 4) {
EICRA |= (3 << pin_num * 2); EICRA |= (3 << pin_num * 2);
} }
#if defined(EICRB)
else { else {
EICRB |= (3 << (pin_num * 2) % 4); EICRB |= (3 << (pin_num * 2) % 4);
} }
#endif
break; break;
case GPIO_FALLING: case GPIO_FALLING:
if (pin_num < 4) { if (pin_num < 4) {
EICRA |= (2 << pin_num * 2); EICRA |= (2 << pin_num * 2);
} }
#if defined(EICRB)
else { else {
EICRB |= (2 << (pin_num * 2) % 4); EICRB |= (2 << (pin_num * 2) % 4);
} }
#endif
break; break;
case GPIO_BOTH: case GPIO_BOTH:
if (pin_num < 4) { if (pin_num < 4) {
EICRA |= (1 << pin_num * 2); EICRA |= (1 << pin_num * 2);
} }
#if defined(EICRB)
else { else {
EICRB |= (1 << (pin_num * 2) % 4); EICRB |= (1 << (pin_num * 2) % 4);
} }
#endif
break; break;
default: default:
return -1; return -1;

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@ -61,7 +61,7 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
DDRB |= ((1 << DDB2) | (1 << DDB1) | (1 << DDB0)); DDRB |= ((1 << DDB2) | (1 << DDB1) | (1 << DDB0));
/* make sure the SPI is not powered off */ /* make sure the SPI is not powered off */
PRR0 &= ~(1 << PRSPI); MEGA_PRR &= ~(1 << PRSPI);
/* configure as master, with given mode and clock */ /* configure as master, with given mode and clock */
SPSR = (speed >> S2X_SHIFT); SPSR = (speed >> S2X_SHIFT);

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@ -208,10 +208,12 @@ ISR(TIMER_0_ISRB, ISR_BLOCK)
_isr(0, 1); _isr(0, 1);
} }
#ifdef TIMER_0_ISRC
ISR(TIMER_0_ISRC, ISR_BLOCK) ISR(TIMER_0_ISRC, ISR_BLOCK)
{ {
_isr(0, 2); _isr(0, 2);
} }
#endif /* TIMER_0_ISRC */
#endif /* TIMER_0 */ #endif /* TIMER_0 */
#ifdef TIMER_1 #ifdef TIMER_1