diff --git a/boards/nucleo-l476rg/Makefile.features b/boards/nucleo-l476rg/Makefile.features index b61dd0e29b..eb91dc27bc 100644 --- a/boards/nucleo-l476rg/Makefile.features +++ b/boards/nucleo-l476rg/Makefile.features @@ -3,6 +3,7 @@ CPU_MODEL = stm32l476rg # Put defined MCU peripherals here (in alphabetical order) FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_can FEATURES_PROVIDED += periph_dma FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_pwm diff --git a/boards/nucleo-l476rg/doc.txt b/boards/nucleo-l476rg/doc.txt index 424743d2e8..9a0dc22c5c 100644 --- a/boards/nucleo-l476rg/doc.txt +++ b/boards/nucleo-l476rg/doc.txt @@ -6,23 +6,46 @@ ### MCU -| MCU | | +| MCU | STM32L476RG | |:------------- |:--------------------- | | Family | ARM Cortex-M4 | | Vendor | ST Microelectronics | -| RAM | | -| Flash | | -| Frequency | | -| FPU | | -| Timers | | -| ADCs | | -| UARTs | | -| SPIs | | -| I2Cs | | -| RTC | | -| Vcc | | +| RAM | 128Kb | +| Flash | 1MB | +| Frequency | up to 80MHz | +| FPU | yes | +| Timers | 16 (2x watchdog, 1 SysTick, 6x 16-bit, 2x 32-bit [TIM2]) | +| ADCs | 1x 12-bit | +| UARTs | 3 (two UARTs and one Low-Power UART) | +| SPIs | 3 | +| I2Cs | 3 | +| RTC | 1 | +| CAN | 1 | +| Vcc | 1.71 V - 3.6V | | Datasheet | | | Reference Manual | [Reference Manual](http://www.st.com/content/ccc/resource/technical/document/reference_manual/02/35/09/0c/4f/f7/40/03/DM00083560.pdf/files/DM00083560.pdf/jcr:content/translations/en.DM00083560.pdf) | | Programming Manual | [Programming Manual](http://www.st.com/content/ccc/resource/technical/document/programming_manual/6c/3a/cb/e7/e4/ea/44/9b/DM00046982.pdf/files/DM00046982.pdf/jcr:content/translations/en.DM00046982.pdf) | -| Board Manual | | +| Board Manual | [Board Manual](https://www.st.com/content/ccc/resource/technical/document/user_manual/98/2e/fa/4b/e0/82/43/b7/DM00105823.pdf/files/DM00105823.pdf/jcr:content/translations/en.DM00105823.pdf) | + +## Flashing the device + +The ST Nucleo-L476RG board includes an on-board ST-LINK V2 programmer. The +easiest way to program the board is to use OpenOCD. Once you have installed +OpenOCD (look [here](https://github.com/RIOT-OS/RIOT/wiki/OpenOCD) for +installation instructions), you can flash the board simply by typing + +``` +make BOARD=nucleo-l476rg flash +``` +and debug via GDB by simply typing +``` +make BOARD=nucleo-l476rg debug +``` + + +## Supported Toolchains + +For using the ST Nucleo-L476RG board we strongly recommend the usage of the +[GNU Tools for ARM Embedded Processors](https://launchpad.net/gcc-arm-embedded) +toolchain. */ diff --git a/cpu/stm32_common/include/can_params.h b/cpu/stm32_common/include/can_params.h index 47f98badb8..a5a927fe9e 100644 --- a/cpu/stm32_common/include/can_params.h +++ b/cpu/stm32_common/include/can_params.h @@ -39,18 +39,26 @@ static const can_conf_t candev_conf[] = { .irqn = CEC_CAN_IRQn, #else .can = CAN1, +#if defined(CPU_FAM_STM32L4) + .rcc_mask = RCC_APB1ENR1_CAN1EN, +#else .rcc_mask = RCC_APB1ENR_CAN1EN, .can_master = CAN1, .master_rcc_mask = RCC_APB1ENR_CAN1EN, .first_filter = 0, .nb_filters = 14, -#ifndef CPU_FAM_STM32F1 +#endif +#if defined(CPU_FAM_STM32F1) + .rx_pin = GPIO_PIN(PORT_A, 11), + .tx_pin = GPIO_PIN(PORT_A, 12), +#elif defined(CPU_FAM_STM32L4) + .rx_pin = GPIO_PIN(PORT_B, 8), + .tx_pin = GPIO_PIN(PORT_B, 9), + .af = GPIO_AF9, +#else .rx_pin = GPIO_PIN(PORT_D, 0), .tx_pin = GPIO_PIN(PORT_D, 1), .af = GPIO_AF9, -#else - .rx_pin = GPIO_PIN(PORT_A, 11), - .tx_pin = GPIO_PIN(PORT_A, 12), #endif .tx_irqn = CAN1_TX_IRQn, .rx0_irqn = CAN1_RX0_IRQn, diff --git a/cpu/stm32_common/include/candev_stm32.h b/cpu/stm32_common/include/candev_stm32.h index 5a277c7990..8b4a8dc839 100644 --- a/cpu/stm32_common/include/candev_stm32.h +++ b/cpu/stm32_common/include/candev_stm32.h @@ -41,7 +41,8 @@ extern "C" { #define CANDEV_STM32_CHAN_NUMOF 3 #elif defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) #define CANDEV_STM32_CHAN_NUMOF 2 -#elif defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || DOXYGEN +#elif defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \ + defined(CPU_FAM_STM32L4) || DOXYGEN /** Number of channels in the device (up to 3) */ #define CANDEV_STM32_CHAN_NUMOF 1 #else