cpu/esp32: fix problem with tests/thread_race

The problem seemed to be a pipelining problem of write and read instructions when swapping the context. An isync instruction when returning from a context switch solves the potential pipelining problem.

cpu/esp32/thread_arch.c

@@ -247,6 +247,13 @@ void  thread_yield_higher(void)
     }
     #endif
 
+    /*
+     * Instruction fetch synchronize: Waits for all previously fetched load,
+     * store, cache, and special register write instructions that affect
+     * instruction fetch to be performed before fetching the next instruction.
+     */
+    __asm__("isync");
+
     return;
 }