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cpu/cc2538: clear only the latched UART interrupt flags

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Otherwise incoming bytes can remain in the receive FIFO indefinitely.
This commit is contained in:
Ian Martin 2015-03-19 14:12:33 -04:00
parent f488998c3f
commit 5f05a956db
1 changed files with 5 additions and 9 deletions
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14
cpu/cc2538/periph/uart.c
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@ -111,11 +111,9 @@ void UART_0_ISR(void)
{ {
uint_fast16_t mis; uint_fast16_t mis;
/* Store the current MIS and clear all flags early, except the RTM flag. /* Latch the Masked Interrupt Status and clear any active flags */
* This will clear itself when we read out the entire FIFO contents */
mis = UART_0_DEV->cc2538_uart_mis.MIS; mis = UART_0_DEV->cc2538_uart_mis.MIS;
UART_0_DEV->ICR = mis;
UART_0_DEV->ICR = 0x0000FFBF;
while (UART_0_DEV->cc2538_uart_fr.FRbits.RXFE == 0) { while (UART_0_DEV->cc2538_uart_fr.FRbits.RXFE == 0) {
uart_config[0].rx_cb(uart_config[0].arg, UART_0_DEV->DR); uart_config[0].rx_cb(uart_config[0].arg, UART_0_DEV->DR);
@ -137,11 +135,9 @@ void UART_1_ISR(void)
{ {
uint_fast16_t mis; uint_fast16_t mis;
/* Store the current MIS and clear all flags early, except the RTM flag. /* Latch the Masked Interrupt Status and clear any active flags */
* This will clear itself when we read out the entire FIFO contents */ mis = UART_1_DEV->cc2538_uart_mis.MIS;
mis = UART_1_DEV->MIS; UART_1_DEV->ICR = mis;
UART_1_DEV->ICR = 0x0000FFBF;
while (UART_1_DEV->FRbits.RXFE == 0) { while (UART_1_DEV->FRbits.RXFE == 0) {
uart_config[1].rx_cb(uart_config[1].arg, UART_1_DEV->DR); uart_config[1].rx_cb(uart_config[1].arg, UART_1_DEV->DR);