boards/chronos: adapted to periph UART driver

boards/chronos/include/board.h

@@ -47,6 +47,18 @@ extern "C" {
  */
 #define HW_TIMER                    (0)
 
+/**
+ * @brief   Standard input/output device configuration
+ *
+ * This defines are for compatibility with the CPU implementation but they are
+ * not used for this board (as it has no UART interface accessible...)
+ * @{
+ */
+#define STDIO                       (0)
+#define STDIO_BAUDRATE              (115200U)
+#define STDIO_RX_BUFSIZE            (64U)
+/** @} */
+
 #define MSP430_INITIAL_CPU_SPEED    7372800uL
 #define F_CPU                       MSP430_INITIAL_CPU_SPEED
 #define F_RC_OSCILLATOR             32768

boards/chronos/include/periph_conf.h

@@ -25,6 +25,16 @@
 extern "C" {
 #endif
 
+/**
+ * @brief   Clock configuration
+ *
+ * @todo    Move all clock configuration code here from the board.h
+ */
+#define CLOCK_CORECLOCK     (12000000U)
+
+#define CLOCK_CMCLK         CLOCK_CORECLOCK     /* no divider programmed */
+/** @} */
+
 /**
  * @brief   Timer configuration
  * @{
@@ -35,6 +45,27 @@ extern "C" {
 #define TIMER_ISR_CCX       (TIMER0_A1_VECTOR)
 /** @} */
 
+/**
+ * @brief   UART configuration
+ * @{
+ */
+#define UART_NUMOF          (1U)
+#define UART_0_EN           (1U)
+
+#define UART_DEV            (USART_1)
+#define UART_IE             (SFR->IE2)
+#define UART_IF             (SFR->IFG2)
+#define UART_IE_RX_BIT      (1 << 4)
+#define UART_IE_TX_BIT      (1 << 5)
+#define UART_ME             (SFR->ME2)
+#define UART_ME_BITS        (0x30)
+#define UART_PORT           (PORT_3)
+#define UART_RX_PIN         (1 << 6)
+#define UART_TX_PIN         (1 << 7)
+#define UART_RX_ISR         (USART1RX_VECTOR)
+#define UART_TX_ISR         (USART1TX_VECTOR)
+/** @} */
+
 /**
  * @brief   Real Time Clock configuration
  */