msp430: Adapt to flashpage/flashpage_pagewise API

This commit is contained in:
Koen Zandberg 2020-11-09 16:44:29 +01:00
parent e176649266
commit 61052dbed7
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GPG Key ID: 0895A893E6D2985B
4 changed files with 19 additions and 24 deletions

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@ -11,7 +11,7 @@ config CPU_ARCH_MSP430
select HAS_ARCH_16BIT select HAS_ARCH_16BIT
select HAS_ARCH_MSP430 select HAS_ARCH_MSP430
select HAS_PERIPH_FLASHPAGE select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_RAW select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_PM select HAS_PERIPH_PM
config CPU_CORE_MSP430 config CPU_CORE_MSP430

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@ -4,5 +4,5 @@ CPU_CORE = msp430
FEATURES_PROVIDED += arch_16bit FEATURES_PROVIDED += arch_16bit
FEATURES_PROVIDED += arch_msp430 FEATURES_PROVIDED += arch_msp430
FEATURES_PROVIDED += periph_flashpage FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_raw FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_pm FEATURES_PROVIDED += periph_pm

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@ -50,9 +50,9 @@ extern "C" {
/* The minimum block size which can be written is 1B. However, the erase /* The minimum block size which can be written is 1B. However, the erase
* block is always FLASHPAGE_SIZE. * block is always FLASHPAGE_SIZE.
*/ */
#define FLASHPAGE_RAW_BLOCKSIZE (1U) #define FLASHPAGE_WRITE_BLOCK_SIZE (1U)
/* Writing should be always 2 byte aligned */ /* Writing should be always 2 byte aligned */
#define FLASHPAGE_RAW_ALIGNMENT (2U) #define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (2U)
/** @} */ /** @} */
/** /**

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@ -55,15 +55,25 @@ static inline void _erase(uint16_t *page_addr)
_lock(state); _lock(state);
} }
void flashpage_write_raw(void *target_addr, const void *data, size_t len) void flashpage_erase(unsigned page)
{ {
/* assert multiples of FLASHPAGE_RAW_BLOCKSIZE are written and no less of assert((unsigned) page < FLASHPAGE_NUMOF);
uint16_t *page_addr = (uint16_t *)flashpage_addr(page);
/* erase page */
_erase(page_addr);
}
void flashpage_write(void *target_addr, const void *data, size_t len)
{
/* assert multiples of FLASHPAGE_WRITE_BLOCK_SIZE are written and no less of
that length. */ that length. */
assert(!(len % FLASHPAGE_RAW_BLOCKSIZE)); assert(!(len % FLASHPAGE_WRITE_BLOCK_SIZE));
/* ensure writes are aligned */ /* ensure writes are aligned */
assert(!(((unsigned)target_addr % FLASHPAGE_RAW_ALIGNMENT) || assert(!(((unsigned)target_addr % FLASHPAGE_WRITE_BLOCK_ALIGNMENT) ||
((unsigned)data % FLASHPAGE_RAW_ALIGNMENT))); ((unsigned)data % FLASHPAGE_WRITE_BLOCK_ALIGNMENT)));
/* ensure the length doesn't exceed the actual flash size */ /* ensure the length doesn't exceed the actual flash size */
assert(((unsigned)target_addr + len) < assert(((unsigned)target_addr + len) <
@ -87,18 +97,3 @@ void flashpage_write_raw(void *target_addr, const void *data, size_t len)
/* lock flash and re-enable interrupts */ /* lock flash and re-enable interrupts */
_lock(state); _lock(state);
} }
void flashpage_write(int page, const void *data)
{
assert((unsigned) page < FLASHPAGE_NUMOF);
uint16_t *page_addr = (uint16_t *)flashpage_addr(page);
/* erase page */
_erase(page_addr);
/* write page */
if (data != NULL) {
flashpage_write_raw(page_addr, data, FLASHPAGE_SIZE);
}
}