boards: adapt stm32f3 based boards to new I2C api
This commit is contained in:
Alexandre Abadie
dylad
parent
c95ee04b23
commit
634d9f6d68
@ -194,47 +194,37 @@ static const spi_conf_t spi_config[] = {
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* @name I2C configuration
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* @name I2C configuration
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* @{
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* @{
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*/
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*/
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#define I2C_NUMOF (2U)
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static const i2c_conf_t i2c_config[] = {
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#define I2C_0_EN 1
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{
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#define I2C_1_EN 1
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.dev = I2C1,
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#define I2C_IRQ_PRIO 1
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.speed = I2C_SPEED_NORMAL,
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#define I2C_APBCLK (36000000U)
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.scl_pin = GPIO_PIN(PORT_B, 8),
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.sda_pin = GPIO_PIN(PORT_B, 9),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C1EN,
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.rcc_sw_mask = RCC_CFGR3_I2C1SW,
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.irqn = I2C1_ER_IRQn
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},
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{
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.dev = I2C3,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_A, 8),
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.sda_pin = GPIO_PIN(PORT_A, 5),
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.scl_af = GPIO_AF5,
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.sda_af = GPIO_AF8,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C3EN,
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.rcc_sw_mask = RCC_CFGR3_I2C3SW,
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.irqn = I2C3_ER_IRQn
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}
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};
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/* I2C 0 device configuration */
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#define I2C_0_ISR isr_i2c1_er
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#define I2C_0_DEV I2C1
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#define I2C_1_ISR isr_i2c3_er
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#define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
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#define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
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#define I2C_0_EVT_IRQ I2C1_EV_IRQn
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#define I2C_0_EVT_ISR isr_i2c1_ev
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#define I2C_0_ERR_IRQ I2C1_ER_IRQn
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#define I2C_0_ERR_ISR isr_i2c1_er
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/* I2C 0 pin configuration */
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#define I2C_0_SCL_PORT GPIOB
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#define I2C_0_SCL_PIN 8
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#define I2C_0_SCL_AF 4
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#define I2C_0_SCL_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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#define I2C_0_SDA_PORT GPIOB
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#define I2C_0_SDA_PIN 9
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#define I2C_0_SDA_AF 4
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#define I2C_0_SDA_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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/* I2C 1 device configuration */
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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#define I2C_1_DEV I2C3
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#define I2C_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C3EN))
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#define I2C_1_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C3EN))
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#define I2C_1_EVT_IRQ I2C3_EV_IRQn
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#define I2C_1_EVT_ISR isr_i2c3_ev
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#define I2C_1_ERR_IRQ I2C3_ER_IRQn
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#define I2C_1_ERR_ISR isr_i2c3_er
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/* I2C 1 pin configuration */
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#define I2C_1_SCL_PORT GPIOA
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#define I2C_1_SCL_PIN 8
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#define I2C_1_SCL_AF 3
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#define I2C_1_SCL_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
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#define I2C_1_SDA_PORT GPIOB
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#define I2C_1_SDA_PIN 5
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#define I2C_1_SDA_AF 8
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#define I2C_1_SDA_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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/** @} */
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/** @} */
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -195,47 +195,37 @@ static const spi_conf_t spi_config[] = {
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* @name I2C configuration
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* @name I2C configuration
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* @{
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* @{
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*/
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*/
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#define I2C_NUMOF (2U)
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static const i2c_conf_t i2c_config[] = {
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#define I2C_0_EN 1
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{
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#define I2C_1_EN 1
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.dev = I2C1,
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#define I2C_IRQ_PRIO 1
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.speed = I2C_SPEED_NORMAL,
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#define I2C_APBCLK (CLOCK_APB1)
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.scl_pin = GPIO_PIN(PORT_B, 8),
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.sda_pin = GPIO_PIN(PORT_B, 9),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C1EN,
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.rcc_sw_mask = RCC_CFGR3_I2C1SW,
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.irqn = I2C1_ER_IRQn
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},
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{
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.dev = I2C3,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_A, 8),
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.sda_pin = GPIO_PIN(PORT_A, 5),
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.scl_af = GPIO_AF5,
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.sda_af = GPIO_AF8,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C3EN,
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.rcc_sw_mask = RCC_CFGR3_I2C3SW,
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.irqn = I2C3_ER_IRQn
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}
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};
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/* I2C 0 device configuration */
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#define I2C_0_ISR isr_i2c1_er
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#define I2C_0_DEV I2C1
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#define I2C_1_ISR isr_i2c3_er
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#define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
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#define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
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#define I2C_0_EVT_IRQ I2C1_EV_IRQn
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#define I2C_0_EVT_ISR isr_i2c1_ev
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#define I2C_0_ERR_IRQ I2C1_ER_IRQn
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#define I2C_0_ERR_ISR isr_i2c1_er
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/* I2C 0 pin configuration */
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#define I2C_0_SCL_PORT GPIOB
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#define I2C_0_SCL_PIN 8
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#define I2C_0_SCL_AF 4
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#define I2C_0_SCL_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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#define I2C_0_SDA_PORT GPIOB
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#define I2C_0_SDA_PIN 9
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#define I2C_0_SDA_AF 4
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#define I2C_0_SDA_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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/* I2C 1 device configuration */
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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#define I2C_1_DEV I2C3
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#define I2C_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C3EN))
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#define I2C_1_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C3EN))
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#define I2C_1_EVT_IRQ I2C3_EV_IRQn
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#define I2C_1_EVT_ISR isr_i2c3_ev
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#define I2C_1_ERR_IRQ I2C3_ER_IRQn
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#define I2C_1_ERR_ISR isr_i2c3_er
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/* I2C 1 pin configuration */
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#define I2C_1_SCL_PORT GPIOA
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#define I2C_1_SCL_PIN 8
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#define I2C_1_SCL_AF 3
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#define I2C_1_SCL_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOAEN))
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#define I2C_1_SDA_PORT GPIOB
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#define I2C_1_SDA_PIN 5
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#define I2C_1_SDA_AF 8
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#define I2C_1_SDA_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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/** @} */
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/** @} */
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -209,47 +209,37 @@ static const spi_conf_t spi_config[] = {
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* @name I2C configuration
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* @name I2C configuration
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* @{
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* @{
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*/
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*/
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#define I2C_NUMOF (2U)
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static const i2c_conf_t i2c_config[] = {
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#define I2C_0_EN 1
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{
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#define I2C_1_EN 1
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.dev = I2C1,
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#define I2C_IRQ_PRIO 1
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.speed = I2C_SPEED_NORMAL,
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#define I2C_APBCLK (CLOCK_APB1)
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.scl_pin = GPIO_PIN(PORT_B, 6),
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.sda_pin = GPIO_PIN(PORT_B, 7),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C1EN,
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.rcc_sw_mask = RCC_CFGR3_I2C1SW,
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.irqn = I2C1_ER_IRQn
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},
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{
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.dev = I2C2,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_F, 1),
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.sda_pin = GPIO_PIN(PORT_F, 0),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C2EN,
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.rcc_sw_mask = RCC_CFGR3_I2C2SW,
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.irqn = I2C2_ER_IRQn
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}
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};
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/* I2C 0 device configuration */
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#define I2C_0_ISR isr_i2c1_er
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#define I2C_0_DEV I2C1
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#define I2C_1_ISR isr_i2c2_er
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#define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
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#define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
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#define I2C_0_EVT_IRQ I2C1_EV_IRQn
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#define I2C_0_EVT_ISR isr_i2c1_ev
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#define I2C_0_ERR_IRQ I2C1_ER_IRQn
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#define I2C_0_ERR_ISR isr_i2c1_er
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/* I2C 0 pin configuration */
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#define I2C_0_SCL_PORT GPIOB
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#define I2C_0_SCL_PIN 6
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#define I2C_0_SCL_AF 4
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#define I2C_0_SCL_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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#define I2C_0_SDA_PORT GPIOB
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#define I2C_0_SDA_PIN 7
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#define I2C_0_SDA_AF 4
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#define I2C_0_SDA_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOBEN))
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/* I2C 1 device configuration */
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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#define I2C_1_DEV I2C2
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#define I2C_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C2EN))
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#define I2C_1_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C2EN))
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#define I2C_1_EVT_IRQ I2C2_EV_IRQn
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#define I2C_1_EVT_ISR isr_i2c2_ev
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#define I2C_1_ERR_IRQ I2C2_ER_IRQn
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#define I2C_1_ERR_ISR isr_i2c2_er
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/* I2C 1 pin configuration */
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#define I2C_1_SCL_PORT GPIOF
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#define I2C_1_SCL_PIN 1
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#define I2C_1_SCL_AF 4
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#define I2C_1_SCL_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOFEN))
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#define I2C_1_SDA_PORT GPIOF
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#define I2C_1_SDA_PIN 0
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#define I2C_1_SDA_AF 4
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#define I2C_1_SDA_CLKEN() (periph_clk_en(AHB, RCC_AHBENR_GPIOFEN))
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/** @} */
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/** @} */
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#ifdef __cplusplus
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#ifdef __cplusplus
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